forked from OSchip/llvm-project
[CUDA] Add appropriate host/device attribute to builtins.
The changes are part of attribute-based CUDA function overloading (D12453) and as such are only enabled when it's in effect (-fcuda-target-overloads). Differential Revision: http://reviews.llvm.org/D12122 llvm-svn: 248296
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@ -81,6 +81,11 @@ public:
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return getRecord(ID).Type;
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}
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/// \brief Return true if this function is a target-specific builtin
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bool isTSBuiltin(unsigned ID) const {
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return ID >= Builtin::FirstTSBuiltin;
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}
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/// \brief Return true if this function has no side effects and doesn't
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/// read memory.
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bool isConst(unsigned ID) const {
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@ -529,7 +529,7 @@ Sema::CheckBuiltinFunctionCall(FunctionDecl *FDecl, unsigned BuiltinID,
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// Since the target specific builtins for each arch overlap, only check those
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// of the arch we are compiling for.
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if (BuiltinID >= Builtin::FirstTSBuiltin) {
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if (Context.BuiltinInfo.isTSBuiltin(BuiltinID)) {
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switch (Context.getTargetInfo().getTriple().getArch()) {
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case llvm::Triple::arm:
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case llvm::Triple::armeb:
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@ -11290,6 +11290,18 @@ void Sema::AddKnownFunctionAttributes(FunctionDecl *FD) {
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FD->addAttr(NoThrowAttr::CreateImplicit(Context, FD->getLocation()));
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if (Context.BuiltinInfo.isConst(BuiltinID) && !FD->hasAttr<ConstAttr>())
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FD->addAttr(ConstAttr::CreateImplicit(Context, FD->getLocation()));
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if (getLangOpts().CUDA && getLangOpts().CUDATargetOverloads &&
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Context.BuiltinInfo.isTSBuiltin(BuiltinID) &&
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!FD->hasAttr<CUDADeviceAttr>() && !FD->hasAttr<CUDAHostAttr>()) {
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// Target-specific builtins are assumed to be intended for use
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// in this particular CUDA compilation mode and should have
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// appropriate attribute set so we can enforce CUDA function
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// call restrictions.
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if (getLangOpts().CUDAIsDevice)
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FD->addAttr(CUDADeviceAttr::CreateImplicit(Context, FD->getLocation()));
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else
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FD->addAttr(CUDAHostAttr::CreateImplicit(Context, FD->getLocation()));
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}
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}
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IdentifierInfo *Name = FD->getIdentifier();
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@ -0,0 +1,36 @@
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// Tests that target-specific builtins have appropriate host/device
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// attributes and that CUDA call restrictions are enforced. Also
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// verify that non-target builtins can be used from both host and
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// device functions.
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//
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// REQUIRES: x86-registered-target
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// REQUIRES: nvptx-registered-target
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// RUN: %clang_cc1 -triple x86_64-unknown-unknown \
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// RUN: -fcuda-target-overloads -fsyntax-only -verify %s
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// RUN: %clang_cc1 -triple nvptx64-unknown-cuda -fcuda-is-device \
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// RUN: -fcuda-target-overloads -fsyntax-only -verify %s
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#ifdef __CUDA_ARCH__
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// Device-side builtins are not allowed to be called from host functions.
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void hf() {
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int x = __builtin_ptx_read_tid_x(); // expected-note {{'__builtin_ptx_read_tid_x' declared here}}
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// expected-error@-1 {{reference to __device__ function '__builtin_ptx_read_tid_x' in __host__ function}}
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x = __builtin_abs(1);
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}
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__attribute__((device)) void df() {
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int x = __builtin_ptx_read_tid_x();
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x = __builtin_abs(1);
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}
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#else
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// Host-side builtins are not allowed to be called from device functions.
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__attribute__((device)) void df() {
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int x = __builtin_ia32_rdtsc(); // expected-note {{'__builtin_ia32_rdtsc' declared here}}
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// expected-error@-1 {{reference to __host__ function '__builtin_ia32_rdtsc' in __device__ function}}
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x = __builtin_abs(1);
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}
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void hf() {
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int x = __builtin_ia32_rdtsc();
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x = __builtin_abs(1);
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}
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#endif
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@ -1,10 +1,13 @@
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// RUN: %clang_cc1 -std=gnu++11 -triple nvptx64-unknown-unknown -fsyntax-only -verify %s
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// RUN: %clang_cc1 -triple nvptx64-unknown-unknown -fcuda-is-device \
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// RUN: -fsyntax-only -verify %s
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// RUN: %clang_cc1 -triple nvptx64-unknown-unknown -fcuda-is-device \
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// RUN: -fcuda-target-overloads -fsyntax-only -verify %s
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#include "Inputs/cuda.h"
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// expected-no-diagnostics
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__device__ void __threadfence_system() {
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// This shouldn't produce an error, since __nvvm_membar_sys is inferred to
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// be __host__ __device__ and thus callable from device code.
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// This shouldn't produce an error, since __nvvm_membar_sys should be
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// __device__ and thus callable from device code.
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__nvvm_membar_sys();
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}
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