maxjhandsome
/
llvm-project
forked from OSchip/llvm-project
1
0
Fork 0
Code Issues Pull Requests Packages Releases Wiki Activity

add aliases for movs between seg registers and mem. There are multiple 

different forms of this instruction (movw/movl/movq) which we reported
as being ambiguous.  Since they all do the same thing, gas just picks the
one with the shortest encoding.  Follow its lead here.

This implements rdar://8208615

llvm-svn: 118362
This commit is contained in:
Chris Lattner 2010-11-06 22:35:34 +00:00
parent 7923358842
commit 9654e108d7
2 changed files with 12 additions and 0 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

5
llvm/lib/Target/X86/X86InstrInfo.td
View File

@ -1465,6 +1465,11 @@ def : InstAlias<"jmpw $seg, $off", (FARJMP16i i16imm:$off, i16imm:$seg)>;
def : InstAlias<"calll $seg, $off", (FARCALL32i i32imm:$off, i16imm:$seg)>;
def : InstAlias<"jmpl $seg, $off", (FARJMP32i i32imm:$off, i16imm:$seg)>;
// Force mov without a suffix with a segment and mem to prefer the 'l' form of
// the move. All segment/mem forms are equivalent, this has the shortest
// encoding.
def : InstAlias<"mov $mem, $seg", (MOV32sm SEGMENT_REG:$seg, i32mem:$mem)>;
def : InstAlias<"mov $seg, $mem", (MOV32ms i32mem:$mem, SEGMENT_REG:$seg)>;
// Match 'movq <largeimm>, <reg>' as an alias for movabsq.
def : InstAlias<"movq $imm, $reg", (MOV64ri GR64:$reg, i64imm:$imm)>;

7
llvm/test/MC/X86/x86-64.s
View File

@ -873,3 +873,10 @@ decl %eax // CHECK: decl %eax # encoding: [0xff,0xc8]
// CHECK: sidt 4(%rax)
// CHECK: encoding: [0x0f,0x01,0x48,0x04]
sidtq 4(%rax)
// rdar://8208615
mov (%rsi), %gs // CHECK: movl (%rsi), %gs # encoding: [0x8e,0x2e]
mov %gs, (%rsi) // CHECK: movl %gs, (%rsi) # encoding: [0x8c,0x2e]