forked from OSchip/llvm-project
Fix bug in zero-store peephole pattern reported in pr11615.
The patch and test case were originally written by Mans Rullgard. llvm-svn: 147024
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@ -1022,10 +1022,14 @@ let Predicates = [IsN64] in {
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}
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// peepholes
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def : Pat<(store (i32 0), addr:$dst), (SW ZERO, addr:$dst)>,
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Requires<[NotN64]>;
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def : Pat<(store (i32 0), addr:$dst), (SW_P8 ZERO, addr:$dst)>,
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Requires<[IsN64]>;
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let Predicates = [NotN64] in {
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def : Pat<(store_a (i32 0), addr:$dst), (SW ZERO, addr:$dst)>;
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def : Pat<(store_u (i32 0), addr:$dst), (USW ZERO, addr:$dst)>;
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}
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let Predicates = [IsN64] in {
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def : Pat<(store_a (i32 0), addr:$dst), (SW_P8 ZERO, addr:$dst)>;
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def : Pat<(store_u (i32 0), addr:$dst), (USW_P8 ZERO, addr:$dst)>;
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}
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// brcond patterns
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multiclass BrcondPats<RegisterClass RC, Instruction BEQOp, Instruction BNEOp,
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@ -0,0 +1,19 @@
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; RUN: llc -march=mipsel < %s | FileCheck %s
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%struct.unaligned = type <{ i32 }>
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define void @zero_u(%struct.unaligned* nocapture %p) nounwind {
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entry:
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; CHECK: usw $zero
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%x = getelementptr inbounds %struct.unaligned* %p, i32 0, i32 0
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store i32 0, i32* %x, align 1
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ret void
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}
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define void @zero_a(i32* nocapture %p) nounwind {
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entry:
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; CHECK: sw $zero
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store i32 0, i32* %p, align 4
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ret void
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}
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