forked from OSchip/llvm-project
[Thumb-1] Fix corner cases for compressed jump tables
Summary: When synthesized TBB/TBH is expanded, we need to avoid the case of: BaseReg is redefined after the load of branching target. E.g.: %R2 = tLEApcrelJT <jt#1> %R1 = tLDRr %R1, %R2 ==> %R2 = tLEApcrelJT <jt#1> %R2 = tLDRspi %SP, 12 %R2 = tLDRspi %SP, 12 tBR_JTr %R1 tTBB_JT %R2, %R1 ` Reviewers: jmolloy Reviewed By: jmolloy Subscribers: llvm-commits, rengolin Differential Revision: https://reviews.llvm.org/D32250 llvm-svn: 300870
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@ -2157,6 +2157,15 @@ bool ARMConstantIslands::optimizeThumb2JumpTables() {
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// If we're in PIC mode, there should be another ADD following.
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// If we're in PIC mode, there should be another ADD following.
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auto *TRI = STI->getRegisterInfo();
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auto *TRI = STI->getRegisterInfo();
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// %base cannot be redefined after the load as it will appear before
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// TBB/TBH like:
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// %base =
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// %base =
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// tBB %base, %idx
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if (registerDefinedBetween(BaseReg, Load->getNextNode(), MBB->end(), TRI))
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continue;
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if (isPositionIndependentOrROPI) {
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if (isPositionIndependentOrROPI) {
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MachineInstr *Add = Load->getNextNode();
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MachineInstr *Add = Load->getNextNode();
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if (Add->getOpcode() != ARM::tADDrr ||
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if (Add->getOpcode() != ARM::tADDrr ||
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