forked from OSchip/llvm-project
Remove another outbreak of customized (and completely broken) hashing.
This one is particularly annoying because the hashing algorithm is highly specialized, with a strange "equivalence" definition that subsets the fields involved. Still, this looks at the exact same set of data as the old code, but without bitwise or-ing over parts of it and other mixing badness. No functionality changed here. I've left a substantial fixme about the fact that there is a cleaner and more principled way to do this, but it requires making the equality definition actual stable for particular types... llvm-svn: 152218
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@ -40,6 +40,7 @@
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#include "llvm/Support/MathExtras.h"
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#include "llvm/Support/raw_ostream.h"
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#include "llvm/ADT/FoldingSet.h"
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#include "llvm/ADT/Hashing.h"
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using namespace llvm;
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//===----------------------------------------------------------------------===//
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@ -1843,49 +1844,52 @@ void MachineInstr::setPhysRegsDeadExcept(ArrayRef<unsigned> UsedRegs,
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unsigned
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MachineInstrExpressionTrait::getHashValue(const MachineInstr* const &MI) {
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unsigned Hash = MI->getOpcode() * 37;
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// Build up a buffer of hash code components.
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//
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// FIXME: This is a total hack. We should have a hash_value overload for
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// MachineOperand, but currently that doesn't work because there are many
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// different ideas of "equality" and thus different sets of information that
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// contribute to the hash code. This one happens to want to take a specific
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// subset. It's not clear that this routine uses the correct set of
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// information, it would be good to somehow ensure this function is
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// MachineInstr::isIdenticalTo with the 'IgnoreVRegDefs' filter look at the
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// same bits.
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SmallVector<size_t, 8> HashComponents;
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HashComponents.reserve(MI->getNumOperands() + 1);
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HashComponents.push_back(MI->getOpcode());
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for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
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const MachineOperand &MO = MI->getOperand(i);
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uint64_t Key = (uint64_t)MO.getType() << 32;
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switch (MO.getType()) {
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default: break;
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case MachineOperand::MO_Register:
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if (MO.isDef() && TargetRegisterInfo::isVirtualRegister(MO.getReg()))
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continue; // Skip virtual register defs.
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Key |= MO.getReg();
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HashComponents.push_back(hash_combine(MO.getType(), MO.getReg()));
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break;
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case MachineOperand::MO_Immediate:
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Key |= MO.getImm();
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HashComponents.push_back(hash_combine(MO.getType(), MO.getImm()));
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break;
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case MachineOperand::MO_FrameIndex:
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case MachineOperand::MO_ConstantPoolIndex:
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case MachineOperand::MO_JumpTableIndex:
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Key |= MO.getIndex();
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HashComponents.push_back(hash_combine(MO.getType(), MO.getIndex()));
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break;
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case MachineOperand::MO_MachineBasicBlock:
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Key |= DenseMapInfo<void*>::getHashValue(MO.getMBB());
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HashComponents.push_back(hash_combine(MO.getType(), MO.getMBB()));
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break;
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case MachineOperand::MO_GlobalAddress:
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Key |= DenseMapInfo<void*>::getHashValue(MO.getGlobal());
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HashComponents.push_back(hash_combine(MO.getType(), MO.getGlobal()));
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break;
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case MachineOperand::MO_BlockAddress:
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Key |= DenseMapInfo<void*>::getHashValue(MO.getBlockAddress());
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HashComponents.push_back(hash_combine(MO.getType(),
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MO.getBlockAddress()));
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break;
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case MachineOperand::MO_MCSymbol:
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Key |= DenseMapInfo<void*>::getHashValue(MO.getMCSymbol());
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HashComponents.push_back(hash_combine(MO.getType(), MO.getMCSymbol()));
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break;
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}
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Key += ~(Key << 32);
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Key ^= (Key >> 22);
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Key += ~(Key << 13);
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Key ^= (Key >> 8);
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Key += (Key << 3);
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Key ^= (Key >> 15);
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Key += ~(Key << 27);
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Key ^= (Key >> 31);
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Hash = (unsigned)Key + Hash * 37;
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}
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return Hash;
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return hash_combine_range(HashComponents.begin(), HashComponents.end());
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}
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void MachineInstr::emitError(StringRef Msg) const {
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