forked from OSchip/llvm-project
AArch64/GlobalISel: Fix incorrect ptrmask usage for alignment
I inverted the mask when I ported to the new form of G_PTRMASK in
8bc03d2168
.
I don't think this really broke anything, since G_VASTART isn't
handled for types with an alignment higher than the stack alignment.
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@ -243,7 +243,7 @@ MachineInstrBuilder MachineIRBuilder::buildMaskLowPtrBits(const DstOp &Res,
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LLT PtrTy = Res.getLLTTy(*getMRI());
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LLT MaskTy = LLT::scalar(PtrTy.getSizeInBits());
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Register MaskReg = getMRI()->createGenericVirtualRegister(MaskTy);
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buildConstant(MaskReg, maskTrailingOnes<uint64_t>(NumBits));
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buildConstant(MaskReg, maskTrailingZeros<uint64_t>(NumBits));
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return buildPtrMask(Res, Op0, MaskReg);
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}
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@ -23,8 +23,8 @@ body: |
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; CHECK: [[LOAD2:%[0-9]+]]:_(p0) = G_LOAD [[COPY]](p0) :: (load 8)
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; CHECK: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 15
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; CHECK: [[PTR_ADD2:%[0-9]+]]:_(p0) = G_PTR_ADD [[LOAD2]], [[C1]](s64)
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; CHECK: [[COPY1:%[0-9]+]]:_(s64) = COPY [[C1]](s64)
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; CHECK: [[PTRMASK:%[0-9]+]]:_(p0) = G_PTRMASK [[PTR_ADD2]], [[COPY1]](s64)
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; CHECK: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 -16
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; CHECK: [[PTRMASK:%[0-9]+]]:_(p0) = G_PTRMASK [[PTR_ADD2]], [[C2]](s64)
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; CHECK: [[PTR_ADD3:%[0-9]+]]:_(p0) = G_PTR_ADD [[PTRMASK]], [[C]](s64)
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; CHECK: G_STORE [[PTR_ADD3]](p0), [[COPY]](p0) :: (store 8)
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%0:_(p0) = COPY $x0
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