forked from OSchip/llvm-project
Avoid creating shift-by-zero SDNodes in the common case of
i8* getelementptr. DAGCombine eliminates these, but this is a fairly common case. llvm-svn: 55214
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@ -2814,16 +2814,17 @@ void SelectionDAGLowering::visitGetElementPtr(User &I) {
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// If this is a multiply by a power of two, turn it into a shl
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// immediately. This is a very common case.
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if (isPowerOf2_64(ElementSize)) {
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unsigned Amt = Log2_64(ElementSize);
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IdxN = DAG.getNode(ISD::SHL, N.getValueType(), IdxN,
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DAG.getConstant(Amt, TLI.getShiftAmountTy()));
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N = DAG.getNode(ISD::ADD, N.getValueType(), N, IdxN);
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continue;
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if (ElementSize != 1) {
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if (isPowerOf2_64(ElementSize)) {
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unsigned Amt = Log2_64(ElementSize);
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IdxN = DAG.getNode(ISD::SHL, N.getValueType(), IdxN,
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DAG.getConstant(Amt, TLI.getShiftAmountTy()));
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} else {
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SDValue Scale = DAG.getIntPtrConstant(ElementSize);
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IdxN = DAG.getNode(ISD::MUL, N.getValueType(), IdxN, Scale);
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}
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}
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SDValue Scale = DAG.getIntPtrConstant(ElementSize);
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IdxN = DAG.getNode(ISD::MUL, N.getValueType(), IdxN, Scale);
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N = DAG.getNode(ISD::ADD, N.getValueType(), N, IdxN);
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}
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}
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