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AMDGPU: Simplify isSchedulingBoundary 

llvm-svn: 274953
This commit is contained in:
Matt Arsenault 2016-07-09 01:13:51 +00:00
parent 152e7c8b12
commit 95c7897555
1 changed files with 4 additions and 5 deletions
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9
llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
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@ -1455,14 +1455,13 @@ MachineInstr *SIInstrInfo::convertToThreeAddress(MachineFunction::iterator &MBB,
bool SIInstrInfo::isSchedulingBoundary(const MachineInstr &MI, bool SIInstrInfo::isSchedulingBoundary(const MachineInstr &MI,
const MachineBasicBlock *MBB, const MachineBasicBlock *MBB,
const MachineFunction &MF) const { const MachineFunction &MF) const {
// XXX - Do we want the SP check in the base implementation?
// Target-independent instructions do not have an implicit-use of EXEC, even // Target-independent instructions do not have an implicit-use of EXEC, even
// when they operate on VGPRs. Treating EXEC modifications as scheduling // when they operate on VGPRs. Treating EXEC modifications as scheduling
// boundaries prevents incorrect movements of such instructions. // boundaries prevents incorrect movements of such instructions.
const SIRegisterInfo *TRI = MF.getSubtarget<SISubtarget>().getRegisterInfo(); return TargetInstrInfo::isSchedulingBoundary(MI, MBB, MF) ||
if (MI.modifiesRegister(AMDGPU::EXEC, TRI)) MI.modifiesRegister(AMDGPU::EXEC, &RI);
return true;
return AMDGPUInstrInfo::isSchedulingBoundary(MI, MBB, MF);
} }
bool SIInstrInfo::isInlineConstant(const APInt &Imm) const { bool SIInstrInfo::isInlineConstant(const APInt &Imm) const {