From 95c7897555f4f99f5ce71f84ab11b63c256293f2 Mon Sep 17 00:00:00 2001 From: Matt Arsenault Date: Sat, 9 Jul 2016 01:13:51 +0000 Subject: [PATCH] AMDGPU: Simplify isSchedulingBoundary llvm-svn: 274953 --- llvm/lib/Target/AMDGPU/SIInstrInfo.cpp | 9 ++++----- 1 file changed, 4 insertions(+), 5 deletions(-) diff --git a/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp b/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp index 4f1eb52c88ae..213cdc310c86 100644 --- a/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp +++ b/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp @@ -1455,14 +1455,13 @@ MachineInstr *SIInstrInfo::convertToThreeAddress(MachineFunction::iterator &MBB, bool SIInstrInfo::isSchedulingBoundary(const MachineInstr &MI, const MachineBasicBlock *MBB, const MachineFunction &MF) const { + // XXX - Do we want the SP check in the base implementation? + // Target-independent instructions do not have an implicit-use of EXEC, even // when they operate on VGPRs. Treating EXEC modifications as scheduling // boundaries prevents incorrect movements of such instructions. - const SIRegisterInfo *TRI = MF.getSubtarget().getRegisterInfo(); - if (MI.modifiesRegister(AMDGPU::EXEC, TRI)) - return true; - - return AMDGPUInstrInfo::isSchedulingBoundary(MI, MBB, MF); + return TargetInstrInfo::isSchedulingBoundary(MI, MBB, MF) || + MI.modifiesRegister(AMDGPU::EXEC, &RI); } bool SIInstrInfo::isInlineConstant(const APInt &Imm) const {