maxjhandsome
/
llvm-project
forked from OSchip/llvm-project
1
0
Fork 0
Code Issues Pull Requests Packages Releases Wiki Activity

LivePhysRegs: Skip reserved regs in computeLiveIns; NFCI 

We do not track liveness of reserved registers so adding them to the
liveins list in computeLiveIns() was completely unnecessary.

llvm-svn: 303937
This commit is contained in:
Matthias Braun 2017-05-25 23:39:33 +00:00
parent ea96891fb4
commit 9512dd5ffd
5 changed files with 12 additions and 6 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
llvm/include/llvm/CodeGen/LivePhysRegs.h
View File

@ -163,7 +163,7 @@ inline raw_ostream &operator<<(raw_ostream &OS, const LivePhysRegs& LR) {
/// lists are up-to-date. Uses the given LivePhysReg instance \p LiveRegs; This
/// is just here to avoid repeated heap allocations when calling this multiple
/// times in a pass.
void computeLiveIns(LivePhysRegs &LiveRegs, const TargetRegisterInfo &TRI,
void computeLiveIns(LivePhysRegs &LiveRegs, const MachineRegisterInfo &MRI,
MachineBasicBlock &MBB);
} // end namespace llvm

7
llvm/lib/CodeGen/BranchFolding.cpp
View File

@ -153,13 +153,14 @@ bool BranchFolder::OptimizeFunction(MachineFunction &MF,
TriedMerging.clear();
MachineRegisterInfo &MRI = MF.getRegInfo();
AfterBlockPlacement = AfterPlacement;
TII = tii;
TRI = tri;
MMI = mmi;
MLI = mli;
this->MRI = &MRI;
MachineRegisterInfo &MRI = MF.getRegInfo();
UpdateLiveIns = MRI.tracksLiveness() && TRI->trackLivenessAfterRegAlloc(MF);
if (!UpdateLiveIns)
MRI.invalidateLiveness();
@ -351,7 +352,7 @@ void BranchFolder::ReplaceTailWithBranchTo(MachineBasicBlock::iterator OldInst,
if (UpdateLiveIns) {
NewDest->clearLiveIns();
computeLiveIns(LiveRegs, *TRI, *NewDest);
computeLiveIns(LiveRegs, *MRI, *NewDest);
}
++NumTailMerge;
@ -388,7 +389,7 @@ MachineBasicBlock *BranchFolder::SplitMBBAt(MachineBasicBlock &CurMBB,
MBBFreqInfo.setBlockFreq(NewMBB, MBBFreqInfo.getBlockFreq(&CurMBB));
if (UpdateLiveIns)
computeLiveIns(LiveRegs, *TRI, *NewMBB);
computeLiveIns(LiveRegs, *MRI, *NewMBB);
// Add the new block to the funclet.
const auto &FuncletI = FuncletMembership.find(&CurMBB);

1
llvm/lib/CodeGen/BranchFolding.h
View File

@ -108,6 +108,7 @@ namespace llvm {
bool UpdateLiveIns;
unsigned MinCommonTailLength;
const TargetInstrInfo *TII;
const MachineRegisterInfo *MRI;
const TargetRegisterInfo *TRI;
MachineModuleInfo *MMI;
MachineLoopInfo *MLI;

2
llvm/lib/CodeGen/BranchRelaxation.cpp
View File

@ -259,7 +259,7 @@ MachineBasicBlock *BranchRelaxation::splitBlockBeforeInstr(MachineInstr &MI,
// Need to fix live-in lists if we track liveness.
if (TRI->trackLivenessAfterRegAlloc(*MF))
computeLiveIns(LiveRegs, *TRI, *NewBB);
computeLiveIns(LiveRegs, MF->getRegInfo(), *NewBB);
++NumSplit;

6
llvm/lib/CodeGen/LivePhysRegs.cpp
View File

@ -200,8 +200,10 @@ void LivePhysRegs::addLiveIns(const MachineBasicBlock &MBB) {
addBlockLiveIns(MBB);
}
void llvm::computeLiveIns(LivePhysRegs &LiveRegs, const TargetRegisterInfo &TRI,
void llvm::computeLiveIns(LivePhysRegs &LiveRegs,
const MachineRegisterInfo &MRI,
MachineBasicBlock &MBB) {
const TargetRegisterInfo &TRI = *MRI.getTargetRegisterInfo();
assert(MBB.livein_empty());
LiveRegs.init(TRI);
LiveRegs.addLiveOutsNoPristines(MBB);
@ -209,6 +211,8 @@ void llvm::computeLiveIns(LivePhysRegs &LiveRegs, const TargetRegisterInfo &TRI,
LiveRegs.stepBackward(MI);
for (unsigned Reg : LiveRegs) {
if (MRI.isReserved(Reg))
continue;
// Skip the register if we are about to add one of its super registers.
bool ContainsSuperReg = false;
for (MCSuperRegIterator SReg(Reg, &TRI); SReg.isValid(); ++SReg) {