forked from OSchip/llvm-project
implement LowerConstantPool and LowerGlobalAddress
llvm-svn: 29433
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parent
300f1979c8
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95035cf001
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@ -168,8 +168,8 @@ void ARMAsmPrinter::printOperand(const MachineInstr *MI, int opNum) {
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abort();
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break;
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case MachineOperand::MO_ConstantPoolIndex:
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assert(0 && "not implemented");
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abort();
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O << PrivateGlobalPrefix << "CPI" << getFunctionNumber()
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<< '_' << MO.getConstantPoolIndex();
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break;
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default:
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O << "<unknown operand type>"; abort (); break;
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@ -41,7 +41,9 @@ namespace {
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ARMTargetLowering::ARMTargetLowering(TargetMachine &TM)
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: TargetLowering(TM) {
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setOperationAction(ISD::RET, MVT::Other, Custom);
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setOperationAction(ISD::RET, MVT::Other, Custom);
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setOperationAction(ISD::GlobalAddress, MVT::i32, Custom);
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setOperationAction(ISD::ConstantPool, MVT::i32, Custom);
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}
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namespace llvm {
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@ -218,6 +220,23 @@ static SDOperand LowerFORMAL_ARGUMENT(SDOperand Op, SelectionDAG &DAG,
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}
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}
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static SDOperand LowerConstantPool(SDOperand Op, SelectionDAG &DAG) {
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MVT::ValueType PtrVT = Op.getValueType();
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ConstantPoolSDNode *CP = cast<ConstantPoolSDNode>(Op);
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Constant *C = CP->get();
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SDOperand CPI = DAG.getTargetConstantPool(C, PtrVT, CP->getAlignment());
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return CPI;
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}
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static SDOperand LowerGlobalAddress(SDOperand Op,
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SelectionDAG &DAG) {
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GlobalValue *GV = cast<GlobalAddressSDNode>(Op)->getGlobal();
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SDOperand CPAddr = DAG.getConstantPool(GV, MVT::i32, 2);
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return DAG.getLoad(MVT::i32, DAG.getEntryNode(), CPAddr,
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DAG.getSrcValue(NULL));
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}
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static SDOperand LowerFORMAL_ARGUMENTS(SDOperand Op, SelectionDAG &DAG) {
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std::vector<SDOperand> ArgValues;
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SDOperand Root = Op.getOperand(0);
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@ -244,6 +263,10 @@ SDOperand ARMTargetLowering::LowerOperation(SDOperand Op, SelectionDAG &DAG) {
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default:
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assert(0 && "Should not custom lower this!");
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abort();
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case ISD::ConstantPool:
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return LowerConstantPool(Op, DAG);
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case ISD::GlobalAddress:
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return LowerGlobalAddress(Op, DAG);
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case ISD::FORMAL_ARGUMENTS:
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return LowerFORMAL_ARGUMENTS(Op, DAG);
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case ISD::CALL:
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