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Fix ldmxcsr JIT encoding. 

llvm-svn: 31343
This commit is contained in:
Evan Cheng 2006-11-01 06:53:52 +00:00
parent dc826fc068
commit 94e5bc9e83
1 changed files with 4 additions and 6 deletions
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10
llvm/lib/Target/X86/X86InstrSSE.td
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@ -1653,12 +1653,10 @@ def MFENCE : I<0xAE, MRM6m, (ops),
"mfence", [(int_x86_sse2_mfence)]>, TB, Requires<[HasSSE2]>; "mfence", [(int_x86_sse2_mfence)]>, TB, Requires<[HasSSE2]>;
// MXCSR register // MXCSR register
def LDMXCSR : I<0xAE, MRM5m, (ops i32mem:$src), def LDMXCSR : PSI<0xAE, MRM2m, (ops i32mem:$src),
"ldmxcsr $src", "ldmxcsr $src", [(int_x86_sse_ldmxcsr addr:$src)]>;
[(int_x86_sse_ldmxcsr addr:$src)]>, TB, Requires<[HasSSE1]>; def STMXCSR : PSI<0xAE, MRM3m, (ops i32mem:$dst),
def STMXCSR : I<0xAE, MRM3m, (ops i32mem:$dst), "stmxcsr $dst", [(int_x86_sse_stmxcsr addr:$dst)]>;
"stmxcsr $dst",
[(int_x86_sse_stmxcsr addr:$dst)]>, TB, Requires<[HasSSE1]>;
// Thread synchronization // Thread synchronization
def MONITOR : I<0xC8, RawFrm, (ops), "monitor", def MONITOR : I<0xC8, RawFrm, (ops), "monitor",