forked from OSchip/llvm-project
Tidy up a bit.
Move common definitions for ARM and Thumb2 into ARMInstrFormats.td and rename them to be a bit more descriptive that they're for the PKH instructions. llvm-svn: 135617
This commit is contained in:
parent
a98f80095b
commit
94df3be987
|
@ -847,6 +847,9 @@ class AMiscA1I<bits<8> opcod, bits<4> opc7_4, dag oops, dag iops,
|
|||
}
|
||||
|
||||
// PKH instructions
|
||||
def pkh_lsl_amt : ImmLeaf<i32, [{ return Imm >= 0 && Imm < 32; }]>;
|
||||
def pkh_asr_amt : ImmLeaf<i32, [{ return Imm > 0 && Imm <= 32; }]>;
|
||||
|
||||
class APKHI<bits<8> opcod, bit tb, dag oops, dag iops, InstrItinClass itin,
|
||||
string opc, string asm, list<dag> pattern>
|
||||
: I<oops, iops, AddrModeNone, 4, IndexModeNone, ArithMiscFrm, itin,
|
||||
|
|
|
@ -3111,15 +3111,11 @@ def : ARMV6Pat<(or (sra (shl GPR:$Rm, (i32 24)), (i32 16)),
|
|||
(and (srl GPR:$Rm, (i32 8)), 0xFF)),
|
||||
(REVSH GPR:$Rm)>;
|
||||
|
||||
def lsl_amt : ImmLeaf<i32, [{
|
||||
return Imm >= 0 && Imm < 32;
|
||||
}]>;
|
||||
|
||||
def PKHBT : APKHI<0b01101000, 0, (outs GPR:$Rd),
|
||||
(ins GPR:$Rn, GPR:$Rm, i32imm:$sh),
|
||||
IIC_iALUsi, "pkhbt", "\t$Rd, $Rn, $Rm, lsl $sh",
|
||||
[(set GPR:$Rd, (or (and GPR:$Rn, 0xFFFF),
|
||||
(and (shl GPR:$Rm, lsl_amt:$sh),
|
||||
(and (shl GPR:$Rm, pkh_lsl_amt:$sh),
|
||||
0xFFFF0000)))]>,
|
||||
Requires<[IsARM, HasV6]>;
|
||||
|
||||
|
@ -3129,17 +3125,13 @@ def : ARMV6Pat<(or (and GPR:$Rn, 0xFFFF), (and GPR:$Rm, 0xFFFF0000)),
|
|||
def : ARMV6Pat<(or (and GPR:$Rn, 0xFFFF), (shl GPR:$Rm, imm16_31:$sh)),
|
||||
(PKHBT GPR:$Rn, GPR:$Rm, imm16_31:$sh)>;
|
||||
|
||||
def asr_amt : ImmLeaf<i32, [{
|
||||
return Imm > 0 && Imm <= 32;
|
||||
}]>;
|
||||
|
||||
// Note: Shifts of 1-15 bits will be transformed to srl instead of sra and
|
||||
// will match the pattern below.
|
||||
def PKHTB : APKHI<0b01101000, 1, (outs GPR:$Rd),
|
||||
(ins GPR:$Rn, GPR:$Rm, i32imm:$sh),
|
||||
IIC_iBITsi, "pkhtb", "\t$Rd, $Rn, $Rm, asr $sh",
|
||||
[(set GPR:$Rd, (or (and GPR:$Rn, 0xFFFF0000),
|
||||
(and (sra GPR:$Rm, asr_amt:$sh),
|
||||
(and (sra GPR:$Rm, pkh_asr_amt:$sh),
|
||||
0xFFFF)))]>,
|
||||
Requires<[IsARM, HasV6]>;
|
||||
|
||||
|
|
|
@ -2616,7 +2616,7 @@ def t2PKHBT : T2ThreeReg<
|
|||
(outs rGPR:$Rd), (ins rGPR:$Rn, rGPR:$Rm, i32imm:$sh),
|
||||
IIC_iBITsi, "pkhbt", "\t$Rd, $Rn, $Rm, lsl $sh",
|
||||
[(set rGPR:$Rd, (or (and rGPR:$Rn, 0xFFFF),
|
||||
(and (shl rGPR:$Rm, lsl_amt:$sh),
|
||||
(and (shl rGPR:$Rm, pkh_lsl_amt:$sh),
|
||||
0xFFFF0000)))]>,
|
||||
Requires<[HasT2ExtractPack, IsThumb2]> {
|
||||
let Inst{31-27} = 0b11101;
|
||||
|
@ -2644,7 +2644,7 @@ def t2PKHTB : T2ThreeReg<
|
|||
(outs rGPR:$Rd), (ins rGPR:$Rn, rGPR:$Rm, i32imm:$sh),
|
||||
IIC_iBITsi, "pkhtb", "\t$Rd, $Rn, $Rm, asr $sh",
|
||||
[(set rGPR:$Rd, (or (and rGPR:$Rn, 0xFFFF0000),
|
||||
(and (sra rGPR:$Rm, asr_amt:$sh),
|
||||
(and (sra rGPR:$Rm, pkh_asr_amt:$sh),
|
||||
0xFFFF)))]>,
|
||||
Requires<[HasT2ExtractPack, IsThumb2]> {
|
||||
let Inst{31-27} = 0b11101;
|
||||
|
|
Loading…
Reference in New Issue