forked from OSchip/llvm-project
parent
9c26462a27
commit
94cfbbab33
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@ -9497,7 +9497,7 @@ SDValue DAGCombiner::ReduceLoadOpStoreWidth(SDNode *N) {
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unsigned MSB = BitWidth - Imm.countLeadingZeros() - 1;
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unsigned NewBW = NextPowerOf2(MSB - ShAmt);
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EVT NewVT = EVT::getIntegerVT(*DAG.getContext(), NewBW);
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// The narowwing should be profitable, the load/store operation should be
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// The narrowwing should be profitable, the load/store operation should be
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// legal (or custom) and the store size should be equal to the NewVT width.
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while (NewBW < BitWidth &&
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(NewVT.getStoreSizeInBits() != NewBW ||
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