forked from OSchip/llvm-project
Update isKilledAt in TwoAddressInstructionPass.cpp to use LiveIntervals when
available. With this commit there are no longer any assertion or verifier failures when running 'make check' without LiveVariables. There are still 56 failing tests with codegen differences and 1 unexpectedly passing test. llvm-svn: 175719
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@ -347,11 +347,33 @@ static bool isCopyToReg(MachineInstr &MI, const TargetInstrInfo *TII,
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///
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static bool isKilled(MachineInstr &MI, unsigned Reg,
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const MachineRegisterInfo *MRI,
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const TargetInstrInfo *TII) {
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const TargetInstrInfo *TII,
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LiveIntervals *LIS) {
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MachineInstr *DefMI = &MI;
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for (;;) {
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if (!DefMI->killsRegister(Reg))
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if (LIS && TargetRegisterInfo::isVirtualRegister(Reg) &&
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!LIS->isNotInMIMap(DefMI)) {
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// FIXME: Sometimes tryInstructionTransform() will add instructions and
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// test whether they can be folded before keeping them. In this case it
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// sets a kill before recursively calling tryInstructionTransform() again.
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// If there is no interval available, we assume that this instruction is
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// one of those. A kill flag is manually inserted on the operand so the
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// check below will handle it.
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LiveInterval &LI = LIS->getInterval(Reg);
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// This is to match the kill flag version where undefs don't have kill
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// flags.
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if (!LI.hasAtLeastOneValue())
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return false;
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SlotIndex useIdx = LIS->getInstructionIndex(DefMI);
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LiveInterval::const_iterator I = LI.find(useIdx);
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assert(I != LI.end() && "Reg must be live-in to use.");
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if (!SlotIndex::isSameInstr(I->end, useIdx))
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return false;
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} else if (!DefMI->killsRegister(Reg)) {
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return false;
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}
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if (TargetRegisterInfo::isPhysicalRegister(Reg))
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return true;
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MachineRegisterInfo::def_iterator Begin = MRI->def_begin(Reg);
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@ -1000,7 +1022,7 @@ tryInstructionTransform(MachineBasicBlock::iterator &mi,
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assert(TargetRegisterInfo::isVirtualRegister(regB) &&
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"cannot make instruction into two-address form");
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bool regBKilled = isKilled(MI, regB, MRI, TII);
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bool regBKilled = isKilled(MI, regB, MRI, TII, LIS);
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if (TargetRegisterInfo::isVirtualRegister(regA))
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scanUses(regA);
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@ -1020,7 +1042,7 @@ tryInstructionTransform(MachineBasicBlock::iterator &mi,
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if (regCIdx != ~0U) {
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regC = MI.getOperand(regCIdx).getReg();
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if (!regBKilled && isKilled(MI, regC, MRI, TII))
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if (!regBKilled && isKilled(MI, regC, MRI, TII, LIS))
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// If C dies but B does not, swap the B and C operands.
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// This makes the live ranges of A and C joinable.
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TryCommute = true;
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