forked from OSchip/llvm-project
Add suppport for ConstantExprs of shufflevectors whose result type is not equal to the
type of the vectors being shuffled. llvm-svn: 64401
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@ -125,7 +125,8 @@ namespace bitc {
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CST_CODE_CE_INSERTELT = 15, // CE_INSERTELT: [opval, opval, opval]
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CST_CODE_CE_SHUFFLEVEC = 16, // CE_SHUFFLEVEC: [opval, opval, opval]
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CST_CODE_CE_CMP = 17, // CE_CMP: [opty, opval, opval, pred]
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CST_CODE_INLINEASM = 18 // INLINEASM: [sideeffect,asmstr,conststr]
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CST_CODE_INLINEASM = 18, // INLINEASM: [sideeffect,asmstr,conststr]
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CST_CODE_CE_SHUFVEC_EX = 19 // SHUFVEC_EX: [opty, opval, opval, opval]
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};
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/// CastOpcodes - These are values used in the bitcode files to encode which
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@ -933,7 +933,7 @@ bool BitcodeReader::ParseConstants() {
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case bitc::CST_CODE_CE_SHUFFLEVEC: { // CE_SHUFFLEVEC: [opval, opval, opval]
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const VectorType *OpTy = dyn_cast<VectorType>(CurTy);
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if (Record.size() < 3 || OpTy == 0)
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return Error("Invalid CE_INSERTELT record");
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return Error("Invalid CE_SHUFFLEVEC record");
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Constant *Op0 = ValueList.getConstantFwdRef(Record[0], OpTy);
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Constant *Op1 = ValueList.getConstantFwdRef(Record[1], OpTy);
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const Type *ShufTy=VectorType::get(Type::Int32Ty, OpTy->getNumElements());
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@ -941,6 +941,18 @@ bool BitcodeReader::ParseConstants() {
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V = ConstantExpr::getShuffleVector(Op0, Op1, Op2);
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break;
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}
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case bitc::CST_CODE_CE_SHUFVEC_EX: { // [opty, opval, opval, opval]
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const VectorType *RTy = dyn_cast<VectorType>(CurTy);
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const VectorType *OpTy = dyn_cast<VectorType>(getTypeByID(Record[0]));
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if (Record.size() < 4 || RTy == 0 || OpTy == 0)
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return Error("Invalid CE_SHUFVEC_EX record");
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Constant *Op0 = ValueList.getConstantFwdRef(Record[1], OpTy);
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Constant *Op1 = ValueList.getConstantFwdRef(Record[2], OpTy);
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const Type *ShufTy=VectorType::get(Type::Int32Ty, RTy->getNumElements());
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Constant *Op2 = ValueList.getConstantFwdRef(Record[3], ShufTy);
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V = ConstantExpr::getShuffleVector(Op0, Op1, Op2);
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break;
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}
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case bitc::CST_CODE_CE_CMP: { // CE_CMP: [opty, opval, opval, pred]
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if (Record.size() < 4) return Error("Invalid CE_CMP record");
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const Type *OpTy = getTypeByID(Record[0]);
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@ -643,7 +643,16 @@ static void WriteConstants(unsigned FirstVal, unsigned LastVal,
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Record.push_back(VE.getValueID(C->getOperand(2)));
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break;
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case Instruction::ShuffleVector:
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Code = bitc::CST_CODE_CE_SHUFFLEVEC;
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// If the return type and argument types are the same, this is a
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// standard shufflevector instruction. If the types are different,
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// then the shuffle is widening or truncating the input vectors, and
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// the argument type must also be encoded.
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if (C->getType() == C->getOperand(0)->getType()) {
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Code = bitc::CST_CODE_CE_SHUFFLEVEC;
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} else {
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Code = bitc::CST_CODE_CE_SHUFVEC_EX;
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Record.push_back(VE.getTypeID(C->getOperand(0)->getType()));
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}
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Record.push_back(VE.getValueID(C->getOperand(0)));
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Record.push_back(VE.getValueID(C->getOperand(1)));
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Record.push_back(VE.getValueID(C->getOperand(2)));
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@ -554,7 +554,10 @@ public:
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return User::operator new(s, 3);
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}
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ShuffleVectorConstantExpr(Constant *C1, Constant *C2, Constant *C3)
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: ConstantExpr(C1->getType(), Instruction::ShuffleVector,
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: ConstantExpr(VectorType::get(
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cast<VectorType>(C1->getType())->getElementType(),
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cast<VectorType>(C3->getType())->getNumElements()),
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Instruction::ShuffleVector,
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&Op<0>(), 3) {
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Op<0>() = C1;
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Op<1>() = C2;
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@ -2349,7 +2352,11 @@ Constant *ConstantExpr::getShuffleVector(Constant *V1, Constant *V2,
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Constant *Mask) {
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assert(ShuffleVectorInst::isValidOperands(V1, V2, Mask) &&
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"Invalid shuffle vector constant expr operands!");
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return getShuffleVectorTy(V1->getType(), V1, V2, Mask);
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unsigned NElts = cast<VectorType>(Mask->getType())->getNumElements();
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const Type *EltTy = cast<VectorType>(V1->getType())->getElementType();
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const Type *ShufTy = VectorType::get(EltTy, NElts);
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return getShuffleVectorTy(ShufTy, V1, V2, Mask);
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}
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Constant *ConstantExpr::getInsertValueTy(const Type *ReqTy, Constant *Agg,
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@ -0,0 +1,14 @@
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; RUN: llvm-as < %s | opt -instcombine | llvm-dis | grep "2 x float"
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target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
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target triple = "i386-apple-darwin9"
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define <4 x float> @__inff4() nounwind readnone {
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entry:
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%tmp14 = extractelement <1 x double> bitcast (<2 x float> <float 0x7FF0000000000000, float 0x7FF0000000000000> to <1 x double>), i32 0 ; <double> [#uses=1]
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%tmp4 = bitcast double %tmp14 to i64 ; <i64> [#uses=1]
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%tmp3 = bitcast i64 %tmp4 to <2 x float> ; <<2 x float>> [#uses=1]
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%tmp8 = shufflevector <2 x float> %tmp3, <2 x float> undef, <4 x i32> <i32 0, i32 1, i32 undef, i32 undef> ; <<4 x float>> [#uses=1]
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%tmp9 = shufflevector <4 x float> zeroinitializer, <4 x float> %tmp8, <4 x i32> <i32 0, i32 1, i32 4, i32 5> ; <<4 x float>> [#uses=0]
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ret <4 x float> %tmp9
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}
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