forked from OSchip/llvm-project
[Attributor] Try to delete stores and simplify stored values
By default we should try to eliminate unused stores and simplify values stored while we are at it.
This commit is contained in:
parent
a3273c0c06
commit
94841c713f
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@ -2874,7 +2874,8 @@ void Attributor::identifyDefaultAbstractAttributes(Function &F) {
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getOrCreateAAFor<AAIsDead>(RetPos);
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// Every function might be simplified.
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getOrCreateAAFor<AAValueSimplify>(RetPos);
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bool UsedAssumedInformation = false;
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getAssumedSimplified(RetPos, nullptr, UsedAssumedInformation);
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// Every returned value might be marked noundef.
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getOrCreateAAFor<AANoUndef>(RetPos);
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@ -2966,7 +2967,8 @@ void Attributor::identifyDefaultAbstractAttributes(Function &F) {
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if (!Callee->getReturnType()->isVoidTy() && !CB.use_empty()) {
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IRPosition CBRetPos = IRPosition::callsite_returned(CB);
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getOrCreateAAFor<AAValueSimplify>(CBRetPos);
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bool UsedAssumedInformation = false;
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getAssumedSimplified(CBRetPos, nullptr, UsedAssumedInformation);
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}
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for (int I = 0, E = CB.arg_size(); I < E; ++I) {
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@ -3029,10 +3031,15 @@ void Attributor::identifyDefaultAbstractAttributes(Function &F) {
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getOrCreateAAFor<AAAlign>(
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IRPosition::value(*cast<LoadInst>(I).getPointerOperand()));
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if (SimplifyAllLoads)
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getOrCreateAAFor<AAValueSimplify>(IRPosition::value(I));
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} else
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getOrCreateAAFor<AAAlign>(
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IRPosition::value(*cast<StoreInst>(I).getPointerOperand()));
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getAssumedSimplified(IRPosition::value(I), nullptr,
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UsedAssumedInformation);
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} else {
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auto &SI = cast<StoreInst>(I);
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getOrCreateAAFor<AAIsDead>(IRPosition::inst(I));
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getAssumedSimplified(IRPosition::value(*SI.getValueOperand()), nullptr,
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UsedAssumedInformation);
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getOrCreateAAFor<AAAlign>(IRPosition::value(*SI.getPointerOperand()));
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}
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return true;
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};
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Success = checkForAllInstructionsImpl(
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@ -645,7 +645,6 @@ define i32 @malloc_in_loop(i32 %0) {
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; IS________OPM: 8:
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; IS________OPM-NEXT: [[TMP9:%.*]] = call noalias i8* @malloc(i64 noundef 4)
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; IS________OPM-NEXT: [[TMP10:%.*]] = bitcast i8* [[TMP9]] to i32*
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; IS________OPM-NEXT: store i32 1, i32* [[TMP10]], align 8
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; IS________OPM-NEXT: br label [[TMP4]]
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; IS________OPM: 11:
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; IS________OPM-NEXT: ret i32 5
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@ -498,7 +498,6 @@ define i32 @malloc_in_loop(i32 %0) {
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; CHECK: 8:
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; CHECK-NEXT: [[TMP9:%.*]] = call noalias i8* @malloc(i64 noundef 4)
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; CHECK-NEXT: [[TMP10:%.*]] = bitcast i8* [[TMP9]] to i32*
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; CHECK-NEXT: store i32 1, i32* [[TMP10]], align 8
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; CHECK-NEXT: br label [[TMP4]]
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; CHECK: 11:
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; CHECK-NEXT: ret i32 5
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@ -214,10 +214,10 @@ define i32 @nc1(i32* %q, i32* %p, i1 %b) {
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; IS__TUNIT____-NEXT: br label [[L:%.*]]
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; IS__TUNIT____: l:
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; IS__TUNIT____-NEXT: [[Y:%.*]] = phi i32* [ [[Q]], [[E:%.*]] ]
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; IS__TUNIT____-NEXT: [[TMP2:%.*]] = select i1 [[B]], i32* [[P]], i32* [[Y]]
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; IS__TUNIT____-NEXT: [[TMP2:%.*]] = select i1 [[B]], i32* [[P]], i32* [[Q]]
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; IS__TUNIT____-NEXT: [[VAL:%.*]] = load i32, i32* [[TMP2]], align 4
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; IS__TUNIT____-NEXT: store i32 0, i32* [[P]], align 4
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; IS__TUNIT____-NEXT: store i32* [[Y]], i32** @g, align 8
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; IS__TUNIT____-NEXT: store i32* [[Q]], i32** @g, align 8
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; IS__TUNIT____-NEXT: ret i32 [[VAL]]
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;
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; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind willreturn
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@ -227,10 +227,10 @@ define i32 @nc1(i32* %q, i32* %p, i1 %b) {
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; IS__CGSCC____-NEXT: br label [[L:%.*]]
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; IS__CGSCC____: l:
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; IS__CGSCC____-NEXT: [[Y:%.*]] = phi i32* [ [[Q]], [[E:%.*]] ]
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; IS__CGSCC____-NEXT: [[TMP2:%.*]] = select i1 [[B]], i32* [[P]], i32* [[Y]]
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; IS__CGSCC____-NEXT: [[TMP2:%.*]] = select i1 [[B]], i32* [[P]], i32* [[Q]]
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; IS__CGSCC____-NEXT: [[VAL:%.*]] = load i32, i32* [[TMP2]], align 4
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; IS__CGSCC____-NEXT: store i32 0, i32* [[P]], align 4
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; IS__CGSCC____-NEXT: store i32* [[Y]], i32** @g, align 8
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; IS__CGSCC____-NEXT: store i32* [[Q]], i32** @g, align 8
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; IS__CGSCC____-NEXT: ret i32 [[VAL]]
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;
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e:
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@ -256,10 +256,10 @@ define i32 @nc1_addrspace(i32* %q, i32 addrspace(1)* %p, i1 %b) {
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; IS__TUNIT____-NEXT: [[X:%.*]] = phi i32 addrspace(1)* [ [[P]], [[E:%.*]] ]
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; IS__TUNIT____-NEXT: [[Y:%.*]] = phi i32* [ [[Q]], [[E]] ]
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; IS__TUNIT____-NEXT: [[TMP:%.*]] = addrspacecast i32 addrspace(1)* [[X]] to i32*
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; IS__TUNIT____-NEXT: [[TMP2:%.*]] = select i1 [[B]], i32* [[TMP]], i32* [[Y]]
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; IS__TUNIT____-NEXT: [[TMP2:%.*]] = select i1 [[B]], i32* [[TMP]], i32* [[Q]]
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; IS__TUNIT____-NEXT: [[VAL:%.*]] = load i32, i32* [[TMP2]], align 4
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; IS__TUNIT____-NEXT: store i32 0, i32* [[TMP]], align 4
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; IS__TUNIT____-NEXT: store i32* [[Y]], i32** @g, align 8
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; IS__TUNIT____-NEXT: store i32* [[Q]], i32** @g, align 8
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; IS__TUNIT____-NEXT: ret i32 [[VAL]]
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;
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; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind willreturn
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@ -271,10 +271,10 @@ define i32 @nc1_addrspace(i32* %q, i32 addrspace(1)* %p, i1 %b) {
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; IS__CGSCC____-NEXT: [[X:%.*]] = phi i32 addrspace(1)* [ [[P]], [[E:%.*]] ]
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; IS__CGSCC____-NEXT: [[Y:%.*]] = phi i32* [ [[Q]], [[E]] ]
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; IS__CGSCC____-NEXT: [[TMP:%.*]] = addrspacecast i32 addrspace(1)* [[X]] to i32*
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; IS__CGSCC____-NEXT: [[TMP2:%.*]] = select i1 [[B]], i32* [[TMP]], i32* [[Y]]
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; IS__CGSCC____-NEXT: [[TMP2:%.*]] = select i1 [[B]], i32* [[TMP]], i32* [[Q]]
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; IS__CGSCC____-NEXT: [[VAL:%.*]] = load i32, i32* [[TMP2]], align 4
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; IS__CGSCC____-NEXT: store i32 0, i32* [[TMP]], align 4
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; IS__CGSCC____-NEXT: store i32* [[Y]], i32** @g, align 8
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; IS__CGSCC____-NEXT: store i32* [[Q]], i32** @g, align 8
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; IS__CGSCC____-NEXT: ret i32 [[VAL]]
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;
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e:
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@ -121,20 +121,16 @@ define void @local_alloca_simplifiable_1(%struct.S* noalias sret(%struct.S) alig
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; IS__TUNIT_OPM-NEXT: call void @write_arg(i32* nocapture nofree nonnull writeonly align 4 dereferenceable(16) [[I3]], i32 noundef 3) #[[ATTR14]]
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; IS__TUNIT_OPM-NEXT: [[F12:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[AGG_RESULT]], i64 0, i32 3
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; IS__TUNIT_OPM-NEXT: store float 0x3FF19999A0000000, float* [[F12]], align 4, !tbaa [[TBAA7:![0-9]+]]
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; IS__TUNIT_OPM-NEXT: [[MUL:%.*]] = fmul float 0x40019999A0000000, 2.000000e+00
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; IS__TUNIT_OPM-NEXT: [[F24:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[AGG_RESULT]], i64 0, i32 4
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; IS__TUNIT_OPM-NEXT: store float [[MUL]], float* [[F24]], align 4, !tbaa [[TBAA10:![0-9]+]]
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; IS__TUNIT_OPM-NEXT: [[ADD:%.*]] = fadd float 0x400A666660000000, 0x3FF19999A0000000
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; IS__TUNIT_OPM-NEXT: store float 0x40119999A0000000, float* [[F24]], align 4, !tbaa [[TBAA10:![0-9]+]]
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; IS__TUNIT_OPM-NEXT: [[F37:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[AGG_RESULT]], i64 0, i32 5
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; IS__TUNIT_OPM-NEXT: store float [[ADD]], float* [[F37]], align 4, !tbaa [[TBAA11:![0-9]+]]
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; IS__TUNIT_OPM-NEXT: store float 0x40119999A0000000, float* [[F37]], align 4, !tbaa [[TBAA11:![0-9]+]]
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; IS__TUNIT_OPM-NEXT: [[I19:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[AGG_RESULT]], i64 0, i32 0
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; IS__TUNIT_OPM-NEXT: store i32 1, i32* [[I19]], align 4, !tbaa [[TBAA12:![0-9]+]]
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; IS__TUNIT_OPM-NEXT: [[MUL11:%.*]] = shl nsw i32 2, 1
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; IS__TUNIT_OPM-NEXT: [[I212:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[AGG_RESULT]], i64 0, i32 1
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; IS__TUNIT_OPM-NEXT: store i32 [[MUL11]], i32* [[I212]], align 4, !tbaa [[TBAA13:![0-9]+]]
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; IS__TUNIT_OPM-NEXT: [[ADD15:%.*]] = add nsw i32 3, 1
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; IS__TUNIT_OPM-NEXT: store i32 4, i32* [[I212]], align 4, !tbaa [[TBAA13:![0-9]+]]
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; IS__TUNIT_OPM-NEXT: [[I316:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[AGG_RESULT]], i64 0, i32 2
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; IS__TUNIT_OPM-NEXT: store i32 [[ADD15]], i32* [[I316]], align 4, !tbaa [[TBAA14:![0-9]+]]
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; IS__TUNIT_OPM-NEXT: store i32 4, i32* [[I316]], align 4, !tbaa [[TBAA14:![0-9]+]]
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; IS__TUNIT_OPM-NEXT: [[I12:%.*]] = bitcast %struct.S* [[S]] to i8*
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; IS__TUNIT_OPM-NEXT: call void @llvm.lifetime.end.p0i8(i64 noundef 24, i8* nocapture nofree noundef nonnull align 4 dereferenceable(24) [[I12]]) #[[ATTR13]]
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; IS__TUNIT_OPM-NEXT: ret void
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@ -157,20 +153,16 @@ define void @local_alloca_simplifiable_1(%struct.S* noalias sret(%struct.S) alig
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; IS__TUNIT_NPM-NEXT: call void @write_arg(i32* nocapture nofree nonnull writeonly align 4 dereferenceable(16) [[I3]], i32 noundef 3) #[[ATTR13]]
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; IS__TUNIT_NPM-NEXT: [[F12:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[AGG_RESULT]], i64 0, i32 3
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; IS__TUNIT_NPM-NEXT: store float 0x3FF19999A0000000, float* [[F12]], align 4, !tbaa [[TBAA7:![0-9]+]]
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; IS__TUNIT_NPM-NEXT: [[MUL:%.*]] = fmul float 0x40019999A0000000, 2.000000e+00
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; IS__TUNIT_NPM-NEXT: [[F24:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[AGG_RESULT]], i64 0, i32 4
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; IS__TUNIT_NPM-NEXT: store float [[MUL]], float* [[F24]], align 4, !tbaa [[TBAA10:![0-9]+]]
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; IS__TUNIT_NPM-NEXT: [[ADD:%.*]] = fadd float 0x400A666660000000, 0x3FF19999A0000000
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; IS__TUNIT_NPM-NEXT: store float 0x40119999A0000000, float* [[F24]], align 4, !tbaa [[TBAA10:![0-9]+]]
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; IS__TUNIT_NPM-NEXT: [[F37:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[AGG_RESULT]], i64 0, i32 5
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; IS__TUNIT_NPM-NEXT: store float [[ADD]], float* [[F37]], align 4, !tbaa [[TBAA11:![0-9]+]]
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; IS__TUNIT_NPM-NEXT: store float 0x40119999A0000000, float* [[F37]], align 4, !tbaa [[TBAA11:![0-9]+]]
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; IS__TUNIT_NPM-NEXT: [[I19:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[AGG_RESULT]], i64 0, i32 0
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; IS__TUNIT_NPM-NEXT: store i32 1, i32* [[I19]], align 4, !tbaa [[TBAA12:![0-9]+]]
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; IS__TUNIT_NPM-NEXT: [[MUL11:%.*]] = shl nsw i32 2, 1
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; IS__TUNIT_NPM-NEXT: [[I212:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[AGG_RESULT]], i64 0, i32 1
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; IS__TUNIT_NPM-NEXT: store i32 [[MUL11]], i32* [[I212]], align 4, !tbaa [[TBAA13:![0-9]+]]
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; IS__TUNIT_NPM-NEXT: [[ADD15:%.*]] = add nsw i32 3, 1
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; IS__TUNIT_NPM-NEXT: store i32 4, i32* [[I212]], align 4, !tbaa [[TBAA13:![0-9]+]]
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; IS__TUNIT_NPM-NEXT: [[I316:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[AGG_RESULT]], i64 0, i32 2
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; IS__TUNIT_NPM-NEXT: store i32 [[ADD15]], i32* [[I316]], align 4, !tbaa [[TBAA14:![0-9]+]]
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; IS__TUNIT_NPM-NEXT: store i32 4, i32* [[I316]], align 4, !tbaa [[TBAA14:![0-9]+]]
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; IS__TUNIT_NPM-NEXT: [[I12:%.*]] = bitcast %struct.S* [[S]] to i8*
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; IS__TUNIT_NPM-NEXT: call void @llvm.lifetime.end.p0i8(i64 noundef 24, i8* nocapture nofree noundef nonnull align 4 dereferenceable(24) [[I12]]) #[[ATTR12]]
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; IS__TUNIT_NPM-NEXT: ret void
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@ -1089,20 +1081,16 @@ define void @static_global_simplifiable_1(%struct.S* noalias sret(%struct.S) ali
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; IS__TUNIT_OPM-NEXT: call void @write_arg(i32* nocapture nofree writeonly align 4 dereferenceable_or_null(16) getelementptr inbounds ([[STRUCT_S]], %struct.S* @Gs1, i64 0, i32 2), i32 noundef 3) #[[ATTR14]]
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; IS__TUNIT_OPM-NEXT: [[F1:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[AGG_RESULT]], i64 0, i32 3
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; IS__TUNIT_OPM-NEXT: store float 0x3FF19999A0000000, float* [[F1]], align 4, !tbaa [[TBAA7]]
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; IS__TUNIT_OPM-NEXT: [[MUL:%.*]] = fmul float 0x40019999A0000000, 2.000000e+00
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; IS__TUNIT_OPM-NEXT: [[F2:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[AGG_RESULT]], i64 0, i32 4
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; IS__TUNIT_OPM-NEXT: store float [[MUL]], float* [[F2]], align 4, !tbaa [[TBAA10]]
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; IS__TUNIT_OPM-NEXT: [[ADD:%.*]] = fadd float 0x400A666660000000, 0x3FF19999A0000000
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; IS__TUNIT_OPM-NEXT: store float 0x40119999A0000000, float* [[F2]], align 4, !tbaa [[TBAA10]]
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; IS__TUNIT_OPM-NEXT: [[F3:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[AGG_RESULT]], i64 0, i32 5
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; IS__TUNIT_OPM-NEXT: store float [[ADD]], float* [[F3]], align 4, !tbaa [[TBAA11]]
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; IS__TUNIT_OPM-NEXT: store float 0x40119999A0000000, float* [[F3]], align 4, !tbaa [[TBAA11]]
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; IS__TUNIT_OPM-NEXT: [[I1:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[AGG_RESULT]], i64 0, i32 0
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; IS__TUNIT_OPM-NEXT: store i32 1, i32* [[I1]], align 4, !tbaa [[TBAA12]]
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; IS__TUNIT_OPM-NEXT: [[MUL1:%.*]] = shl nsw i32 2, 1
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; IS__TUNIT_OPM-NEXT: [[I2:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[AGG_RESULT]], i64 0, i32 1
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; IS__TUNIT_OPM-NEXT: store i32 [[MUL1]], i32* [[I2]], align 4, !tbaa [[TBAA13]]
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; IS__TUNIT_OPM-NEXT: [[ADD2:%.*]] = add nsw i32 3, 1
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; IS__TUNIT_OPM-NEXT: store i32 4, i32* [[I2]], align 4, !tbaa [[TBAA13]]
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; IS__TUNIT_OPM-NEXT: [[I3:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[AGG_RESULT]], i64 0, i32 2
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; IS__TUNIT_OPM-NEXT: store i32 [[ADD2]], i32* [[I3]], align 4, !tbaa [[TBAA14]]
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; IS__TUNIT_OPM-NEXT: store i32 4, i32* [[I3]], align 4, !tbaa [[TBAA14]]
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; IS__TUNIT_OPM-NEXT: ret void
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;
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; IS__TUNIT_NPM: Function Attrs: nofree norecurse nosync nounwind willreturn writeonly
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@ -1114,20 +1102,16 @@ define void @static_global_simplifiable_1(%struct.S* noalias sret(%struct.S) ali
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; IS__TUNIT_NPM-NEXT: call void @write_arg(i32* nocapture nofree writeonly align 4 dereferenceable_or_null(16) getelementptr inbounds ([[STRUCT_S]], %struct.S* @Gs1, i64 0, i32 2), i32 noundef 3) #[[ATTR13]]
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; IS__TUNIT_NPM-NEXT: [[F1:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[AGG_RESULT]], i64 0, i32 3
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; IS__TUNIT_NPM-NEXT: store float 0x3FF19999A0000000, float* [[F1]], align 4, !tbaa [[TBAA7]]
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; IS__TUNIT_NPM-NEXT: [[MUL:%.*]] = fmul float 0x40019999A0000000, 2.000000e+00
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; IS__TUNIT_NPM-NEXT: [[F2:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[AGG_RESULT]], i64 0, i32 4
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; IS__TUNIT_NPM-NEXT: store float [[MUL]], float* [[F2]], align 4, !tbaa [[TBAA10]]
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; IS__TUNIT_NPM-NEXT: [[ADD:%.*]] = fadd float 0x400A666660000000, 0x3FF19999A0000000
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; IS__TUNIT_NPM-NEXT: store float 0x40119999A0000000, float* [[F2]], align 4, !tbaa [[TBAA10]]
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; IS__TUNIT_NPM-NEXT: [[F3:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[AGG_RESULT]], i64 0, i32 5
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; IS__TUNIT_NPM-NEXT: store float [[ADD]], float* [[F3]], align 4, !tbaa [[TBAA11]]
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; IS__TUNIT_NPM-NEXT: store float 0x40119999A0000000, float* [[F3]], align 4, !tbaa [[TBAA11]]
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; IS__TUNIT_NPM-NEXT: [[I1:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[AGG_RESULT]], i64 0, i32 0
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; IS__TUNIT_NPM-NEXT: store i32 1, i32* [[I1]], align 4, !tbaa [[TBAA12]]
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; IS__TUNIT_NPM-NEXT: [[MUL1:%.*]] = shl nsw i32 2, 1
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; IS__TUNIT_NPM-NEXT: [[I2:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[AGG_RESULT]], i64 0, i32 1
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; IS__TUNIT_NPM-NEXT: store i32 [[MUL1]], i32* [[I2]], align 4, !tbaa [[TBAA13]]
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; IS__TUNIT_NPM-NEXT: [[ADD2:%.*]] = add nsw i32 3, 1
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; IS__TUNIT_NPM-NEXT: store i32 4, i32* [[I2]], align 4, !tbaa [[TBAA13]]
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; IS__TUNIT_NPM-NEXT: [[I3:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[AGG_RESULT]], i64 0, i32 2
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; IS__TUNIT_NPM-NEXT: store i32 [[ADD2]], i32* [[I3]], align 4, !tbaa [[TBAA14]]
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; IS__TUNIT_NPM-NEXT: store i32 4, i32* [[I3]], align 4, !tbaa [[TBAA14]]
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; IS__TUNIT_NPM-NEXT: ret void
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;
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; IS__CGSCC_OPM: Function Attrs: nofree nosync nounwind willreturn
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@ -2681,7 +2665,6 @@ define i32 @static_global_not_simplifiable_1(i32 %cnd) {
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; CHECK-NEXT: [[TOBOOL_NOT:%.*]] = icmp eq i32 [[CND]], 0
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; CHECK-NEXT: br i1 [[TOBOOL_NOT]], label [[IF_END:%.*]], label [[IF_THEN:%.*]]
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; CHECK: if.then:
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; CHECK-NEXT: store i32 1, i32* @Flag1, align 4, !tbaa [[TBAA3]]
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; CHECK-NEXT: br label [[IF_END]]
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; CHECK: if.end:
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; CHECK-NEXT: ret i32 1
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@ -1229,16 +1229,14 @@ define internal void @f1(i8*** %a) {
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; IS__TUNIT____-LABEL: define {{[^@]+}}@f1
|
||||
; IS__TUNIT____-SAME: (i8*** nocapture nofree noundef nonnull writeonly align 8 dereferenceable(8) [[A:%.*]]) #[[ATTR3]] {
|
||||
; IS__TUNIT____-NEXT: entry:
|
||||
; IS__TUNIT____-NEXT: [[X:%.*]] = getelementptr { [2 x i8*] }, { [2 x i8*] }* @g, i32 0, i32 0, i32 0
|
||||
; IS__TUNIT____-NEXT: store i8** [[X]], i8*** [[A]], align 8
|
||||
; IS__TUNIT____-NEXT: store i8** getelementptr inbounds ({ [2 x i8*] }, { [2 x i8*] }* @g, i32 0, i32 0, i32 0), i8*** [[A]], align 8
|
||||
; IS__TUNIT____-NEXT: ret void
|
||||
;
|
||||
; IS__CGSCC____: Function Attrs: argmemonly nofree norecurse nosync nounwind willreturn writeonly
|
||||
; IS__CGSCC____-LABEL: define {{[^@]+}}@f1
|
||||
; IS__CGSCC____-SAME: (i8*** nocapture nofree noundef nonnull writeonly align 8 dereferenceable(8) [[A:%.*]]) #[[ATTR4]] {
|
||||
; IS__CGSCC____-NEXT: entry:
|
||||
; IS__CGSCC____-NEXT: [[X:%.*]] = getelementptr { [2 x i8*] }, { [2 x i8*] }* @g, i32 0, i32 0, i32 0
|
||||
; IS__CGSCC____-NEXT: store i8** [[X]], i8*** [[A]], align 8
|
||||
; IS__CGSCC____-NEXT: store i8** getelementptr inbounds ({ [2 x i8*] }, { [2 x i8*] }* @g, i32 0, i32 0, i32 0), i8*** [[A]], align 8
|
||||
; IS__CGSCC____-NEXT: ret void
|
||||
;
|
||||
entry:
|
||||
|
|
|
@ -5181,7 +5181,6 @@ entry:
|
|||
; CHECK1-NEXT: call void @llvm.lifetime.start.p0i8(i64 noundef 4, i8* noundef nonnull [[TMP4]])
|
||||
; CHECK1-NEXT: [[TMP5:%.*]] = ptrtoint i32* [[B]] to i64
|
||||
; CHECK1-NEXT: [[TMP6:%.*]] = trunc i64 [[TMP5]] to i32
|
||||
; CHECK1-NEXT: store i32 [[TMP6]], i32* [[B]], align 4
|
||||
; CHECK1-NEXT: call void @llvm.lifetime.end.p0i8(i64 noundef 4, i8* noundef nonnull [[TMP4]])
|
||||
; CHECK1-NEXT: br label [[OMP_PAR_MERGED_SPLIT:%.*]]
|
||||
; CHECK1: omp.par.merged.split:
|
||||
|
@ -6397,7 +6396,6 @@ entry:
|
|||
; CHECK2-NEXT: call void @llvm.lifetime.start.p0i8(i64 noundef 4, i8* noundef nonnull [[TMP4]])
|
||||
; CHECK2-NEXT: [[TMP5:%.*]] = ptrtoint i32* [[B]] to i64
|
||||
; CHECK2-NEXT: [[TMP6:%.*]] = trunc i64 [[TMP5]] to i32
|
||||
; CHECK2-NEXT: store i32 [[TMP6]], i32* [[B]], align 4
|
||||
; CHECK2-NEXT: call void @llvm.lifetime.end.p0i8(i64 noundef 4, i8* noundef nonnull [[TMP4]])
|
||||
; CHECK2-NEXT: br label [[OMP_PAR_MERGED_SPLIT:%.*]]
|
||||
; CHECK2: omp.par.merged.split:
|
||||
|
|
Loading…
Reference in New Issue