forked from OSchip/llvm-project
PTX: Set PTX 2.0 as the minimum supported version
- Remove PTX 1.4 code generation - Change type of intrinsics to .v4.i32 instead of .v4.i16 - Add and/or/xor integer instructions llvm-svn: 127677
This commit is contained in:
Justin Holewinski
parent
c2631d26c0
commit
94751fbf32
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@ -12,14 +12,17 @@
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//===----------------------------------------------------------------------===//
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let TargetPrefix = "ptx" in {
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// FIXME Since PTX 2.0, special registers are redefined as v4i32 type
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multiclass PTXReadSpecialRegisterIntrinsic_v4i16 {
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def _r64 : Intrinsic<[llvm_i64_ty], [], [IntrNoMem]>;
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def _v4i16 : Intrinsic<[llvm_v4i16_ty], [], [IntrNoMem]>;
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def _x : Intrinsic<[llvm_i16_ty], [], [IntrNoMem]>;
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def _y : Intrinsic<[llvm_i16_ty], [], [IntrNoMem]>;
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def _z : Intrinsic<[llvm_i16_ty], [], [IntrNoMem]>;
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def _w : Intrinsic<[llvm_i16_ty], [], [IntrNoMem]>;
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multiclass PTXReadSpecialRegisterIntrinsic_v4i32 {
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// FIXME: Do we need the 128-bit integer type version?
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// def _r64 : Intrinsic<[llvm_i128_ty], [], [IntrNoMem]>;
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// FIXME: Enable this once v4i32 support is enabled in back-end.
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// def _v4i16 : Intrinsic<[llvm_v4i32_ty], [], [IntrNoMem]>;
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def _x : Intrinsic<[llvm_i32_ty], [], [IntrNoMem]>;
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def _y : Intrinsic<[llvm_i32_ty], [], [IntrNoMem]>;
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def _z : Intrinsic<[llvm_i32_ty], [], [IntrNoMem]>;
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def _w : Intrinsic<[llvm_i32_ty], [], [IntrNoMem]>;
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}
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class PTXReadSpecialRegisterIntrinsic_r32
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@ -29,15 +32,15 @@ let TargetPrefix = "ptx" in {
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: Intrinsic<[llvm_i64_ty], [], [IntrNoMem]>;
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}
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defm int_ptx_read_tid : PTXReadSpecialRegisterIntrinsic_v4i16;
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defm int_ptx_read_ntid : PTXReadSpecialRegisterIntrinsic_v4i16;
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defm int_ptx_read_tid : PTXReadSpecialRegisterIntrinsic_v4i32;
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defm int_ptx_read_ntid : PTXReadSpecialRegisterIntrinsic_v4i32;
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def int_ptx_read_laneid : PTXReadSpecialRegisterIntrinsic_r32;
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def int_ptx_read_warpid : PTXReadSpecialRegisterIntrinsic_r32;
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def int_ptx_read_nwarpid : PTXReadSpecialRegisterIntrinsic_r32;
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defm int_ptx_read_ctaid : PTXReadSpecialRegisterIntrinsic_v4i16;
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defm int_ptx_read_nctaid : PTXReadSpecialRegisterIntrinsic_v4i16;
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defm int_ptx_read_ctaid : PTXReadSpecialRegisterIntrinsic_v4i32;
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defm int_ptx_read_nctaid : PTXReadSpecialRegisterIntrinsic_v4i32;
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def int_ptx_read_smid : PTXReadSpecialRegisterIntrinsic_r32;
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def int_ptx_read_nsmid : PTXReadSpecialRegisterIntrinsic_r32;
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@ -29,17 +29,18 @@ def Feature64Bit : SubtargetFeature<"64bit", "Use64BitAddresses", "true",
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//===- PTX Version --------------------------------------------------------===//
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def FeaturePTX14 : SubtargetFeature<"ptx14", "PTXVersion", "PTX_VERSION_1_4",
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"Use PTX Language Version 1.4">;
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def FeaturePTX20 : SubtargetFeature<"ptx20", "PTXVersion", "PTX_VERSION_2_0",
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"Use PTX Language Version 2.0",
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[FeaturePTX14]>;
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[]>;
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def FeaturePTX21 : SubtargetFeature<"ptx21", "PTXVersion", "PTX_VERSION_2_1",
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"Use PTX Language Version 2.1",
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[FeaturePTX20]>;
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def FeaturePTX22 : SubtargetFeature<"ptx22", "PTXVersion", "PTX_VERSION_2_2",
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"Use PTX Language Version 2.2",
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[FeaturePTX21]>;
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//===- PTX Shader Model ---------------------------------------------------===//
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def FeatureSM10 : SubtargetFeature<"sm10", "PTXShaderModel", "PTX_SM_1_0",
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@ -32,10 +32,11 @@ def SupportsSM20 : Predicate<"getSubtarget().supportsSM20()">;
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def DoesNotSupportSM20 : Predicate<"!getSubtarget().supportsSM20()">;
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// PTX Version Support
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def SupportsPTX20 : Predicate<"getSubtarget().supportsPTX20()">;
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def DoesNotSupportPTX20 : Predicate<"!getSubtarget().supportsPTX20()">;
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def SupportsPTX21 : Predicate<"getSubtarget().supportsPTX21()">;
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def DoesNotSupportPTX21 : Predicate<"!getSubtarget().supportsPTX21()">;
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def SupportsPTX22 : Predicate<"getSubtarget().supportsPTX22()">;
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def DoesNotSupportPTX22 : Predicate<"!getSubtarget().supportsPTX22()">;
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//===----------------------------------------------------------------------===//
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// Instruction Pattern Stuff
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@ -253,6 +254,33 @@ multiclass INT3<string opcstr, SDNode opnode> {
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[(set RRegu64:$d, (opnode RRegu64:$a, imm:$b))]>;
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}
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multiclass PTX_LOGIC<string opcstr, SDNode opnode> {
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def rr16 : InstPTX<(outs RRegu16:$d),
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(ins RRegu16:$a, RRegu16:$b),
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!strconcat(opcstr, ".b16\t$d, $a, $b"),
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[(set RRegu16:$d, (opnode RRegu16:$a, RRegu16:$b))]>;
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def ri16 : InstPTX<(outs RRegu16:$d),
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(ins RRegu16:$a, i16imm:$b),
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!strconcat(opcstr, ".b16\t$d, $a, $b"),
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[(set RRegu16:$d, (opnode RRegu16:$a, imm:$b))]>;
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def rr32 : InstPTX<(outs RRegu32:$d),
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(ins RRegu32:$a, RRegu32:$b),
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!strconcat(opcstr, ".b32\t$d, $a, $b"),
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[(set RRegu32:$d, (opnode RRegu32:$a, RRegu32:$b))]>;
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def ri32 : InstPTX<(outs RRegu32:$d),
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(ins RRegu32:$a, i32imm:$b),
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!strconcat(opcstr, ".b32\t$d, $a, $b"),
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[(set RRegu32:$d, (opnode RRegu32:$a, imm:$b))]>;
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def rr64 : InstPTX<(outs RRegu64:$d),
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(ins RRegu64:$a, RRegu64:$b),
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!strconcat(opcstr, ".b64\t$d, $a, $b"),
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[(set RRegu64:$d, (opnode RRegu64:$a, RRegu64:$b))]>;
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def ri64 : InstPTX<(outs RRegu64:$d),
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(ins RRegu64:$a, i64imm:$b),
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!strconcat(opcstr, ".b64\t$d, $a, $b"),
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[(set RRegu64:$d, (opnode RRegu64:$a, imm:$b))]>;
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}
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// no %type directive, non-communtable
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multiclass INT3ntnc<string opcstr, SDNode opnode> {
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def rr : InstPTX<(outs RRegu32:$d),
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@ -359,6 +387,7 @@ multiclass PTX_ST_ALL<string opstr, PatFrag pat_store> {
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defm ADD : INT3<"add", add>;
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defm SUB : INT3<"sub", sub>;
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defm MUL : INT3<"mul.lo", mul>; // FIXME: Allow 32x32 -> 64 multiplies
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///===- Floating-Point Arithmetic Instructions ----------------------------===//
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@ -462,6 +491,10 @@ defm SHL : INT3ntnc<"shl.b32", PTXshl>;
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defm SRL : INT3ntnc<"shr.u32", PTXsrl>;
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defm SRA : INT3ntnc<"shr.s32", PTXsra>;
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defm AND : PTX_LOGIC<"and", and>;
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defm OR : PTX_LOGIC<"or", or>;
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defm XOR : PTX_LOGIC<"xor", xor>;
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///===- Data Movement and Conversion Instructions -------------------------===//
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let neverHasSideEffects = 1 in {
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@ -23,40 +23,35 @@ class PTX_READ_SPECIAL_REGISTER_R32<string regname, Intrinsic intop>
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!strconcat("mov.u32\t$d, %", regname),
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[(set RRegu32:$d, (intop))]>;
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class PTX_READ_SPECIAL_SUB_REGISTER<string regname, Intrinsic intop>
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: InstPTX<(outs RRegu16:$d), (ins),
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!strconcat("mov.u16\t$d, %", regname),
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[(set RRegu16:$d, (intop))]>;
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// TODO Add read vector-version of special registers
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def PTX_READ_TID_R64 : PTX_READ_SPECIAL_REGISTER_R64<"tid", int_ptx_read_tid_r64>;
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def PTX_READ_TID_X : PTX_READ_SPECIAL_SUB_REGISTER<"tid.x", int_ptx_read_tid_x>;
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def PTX_READ_TID_Y : PTX_READ_SPECIAL_SUB_REGISTER<"tid.y", int_ptx_read_tid_y>;
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def PTX_READ_TID_Z : PTX_READ_SPECIAL_SUB_REGISTER<"tid.z", int_ptx_read_tid_z>;
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def PTX_READ_TID_W : PTX_READ_SPECIAL_SUB_REGISTER<"tid.w", int_ptx_read_tid_w>;
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//def PTX_READ_TID_R64 : PTX_READ_SPECIAL_REGISTER_R64<"tid", int_ptx_read_tid_r64>;
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def PTX_READ_TID_X : PTX_READ_SPECIAL_REGISTER_R32<"tid.x", int_ptx_read_tid_x>;
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def PTX_READ_TID_Y : PTX_READ_SPECIAL_REGISTER_R32<"tid.y", int_ptx_read_tid_y>;
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def PTX_READ_TID_Z : PTX_READ_SPECIAL_REGISTER_R32<"tid.z", int_ptx_read_tid_z>;
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def PTX_READ_TID_W : PTX_READ_SPECIAL_REGISTER_R32<"tid.w", int_ptx_read_tid_w>;
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def PTX_READ_NTID_R64 : PTX_READ_SPECIAL_REGISTER_R64<"ntid", int_ptx_read_ntid_r64>;
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def PTX_READ_NTID_X : PTX_READ_SPECIAL_SUB_REGISTER<"ntid.x", int_ptx_read_ntid_x>;
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def PTX_READ_NTID_Y : PTX_READ_SPECIAL_SUB_REGISTER<"ntid.y", int_ptx_read_ntid_y>;
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def PTX_READ_NTID_Z : PTX_READ_SPECIAL_SUB_REGISTER<"ntid.z", int_ptx_read_ntid_z>;
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def PTX_READ_NTID_W : PTX_READ_SPECIAL_SUB_REGISTER<"ntid.w", int_ptx_read_ntid_w>;
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//def PTX_READ_NTID_R64 : PTX_READ_SPECIAL_REGISTER_R64<"ntid", int_ptx_read_ntid_r64>;
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def PTX_READ_NTID_X : PTX_READ_SPECIAL_REGISTER_R32<"ntid.x", int_ptx_read_ntid_x>;
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def PTX_READ_NTID_Y : PTX_READ_SPECIAL_REGISTER_R32<"ntid.y", int_ptx_read_ntid_y>;
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def PTX_READ_NTID_Z : PTX_READ_SPECIAL_REGISTER_R32<"ntid.z", int_ptx_read_ntid_z>;
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def PTX_READ_NTID_W : PTX_READ_SPECIAL_REGISTER_R32<"ntid.w", int_ptx_read_ntid_w>;
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def PTX_READ_LANEID : PTX_READ_SPECIAL_REGISTER_R32<"laneid", int_ptx_read_laneid>;
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def PTX_READ_WARPID : PTX_READ_SPECIAL_REGISTER_R32<"warpid", int_ptx_read_warpid>;
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def PTX_READ_NWARPID : PTX_READ_SPECIAL_REGISTER_R32<"nwarpid", int_ptx_read_nwarpid>;
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def PTX_READ_CTAID_R64 : PTX_READ_SPECIAL_REGISTER_R64<"ctaid", int_ptx_read_ctaid_r64>;
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def PTX_READ_CTAID_X : PTX_READ_SPECIAL_SUB_REGISTER<"ctaid.x", int_ptx_read_ctaid_x>;
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def PTX_READ_CTAID_Y : PTX_READ_SPECIAL_SUB_REGISTER<"ctaid.y", int_ptx_read_ctaid_y>;
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def PTX_READ_CTAID_Z : PTX_READ_SPECIAL_SUB_REGISTER<"ctaid.z", int_ptx_read_ctaid_z>;
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def PTX_READ_CTAID_W : PTX_READ_SPECIAL_SUB_REGISTER<"ctaid.w", int_ptx_read_ctaid_w>;
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//def PTX_READ_CTAID_R64 : PTX_READ_SPECIAL_REGISTER_R64<"ctaid", int_ptx_read_ctaid_r64>;
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def PTX_READ_CTAID_X : PTX_READ_SPECIAL_REGISTER_R32<"ctaid.x", int_ptx_read_ctaid_x>;
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def PTX_READ_CTAID_Y : PTX_READ_SPECIAL_REGISTER_R32<"ctaid.y", int_ptx_read_ctaid_y>;
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def PTX_READ_CTAID_Z : PTX_READ_SPECIAL_REGISTER_R32<"ctaid.z", int_ptx_read_ctaid_z>;
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def PTX_READ_CTAID_W : PTX_READ_SPECIAL_REGISTER_R32<"ctaid.w", int_ptx_read_ctaid_w>;
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def PTX_READ_NCTAID_R64 : PTX_READ_SPECIAL_REGISTER_R64<"nctaid", int_ptx_read_nctaid_r64>;
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def PTX_READ_NCTAID_X : PTX_READ_SPECIAL_SUB_REGISTER<"nctaid.x", int_ptx_read_nctaid_x>;
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def PTX_READ_NCTAID_Y : PTX_READ_SPECIAL_SUB_REGISTER<"nctaid.y", int_ptx_read_nctaid_y>;
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def PTX_READ_NCTAID_Z : PTX_READ_SPECIAL_SUB_REGISTER<"nctaid.z", int_ptx_read_nctaid_z>;
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def PTX_READ_NCTAID_W : PTX_READ_SPECIAL_SUB_REGISTER<"nctaid.w", int_ptx_read_nctaid_w>;
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//def PTX_READ_NCTAID_R64 : PTX_READ_SPECIAL_REGISTER_R64<"nctaid", int_ptx_read_nctaid_r64>;
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def PTX_READ_NCTAID_X : PTX_READ_SPECIAL_REGISTER_R32<"nctaid.x", int_ptx_read_nctaid_x>;
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def PTX_READ_NCTAID_Y : PTX_READ_SPECIAL_REGISTER_R32<"nctaid.y", int_ptx_read_nctaid_y>;
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def PTX_READ_NCTAID_Z : PTX_READ_SPECIAL_REGISTER_R32<"nctaid.z", int_ptx_read_nctaid_z>;
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def PTX_READ_NCTAID_W : PTX_READ_SPECIAL_REGISTER_R32<"nctaid.w", int_ptx_read_nctaid_w>;
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def PTX_READ_SMID : PTX_READ_SPECIAL_REGISTER_R32<"smid", int_ptx_read_smid>;
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def PTX_READ_NSMID : PTX_READ_SPECIAL_REGISTER_R32<"nsmid", int_ptx_read_nsmid>;
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@ -18,7 +18,7 @@ using namespace llvm;
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PTXSubtarget::PTXSubtarget(const std::string &TT, const std::string &FS)
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: PTXShaderModel(PTX_SM_1_0),
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PTXVersion(PTX_VERSION_1_4),
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PTXVersion(PTX_VERSION_2_0),
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SupportsDouble(false),
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Use64BitAddresses(false) {
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std::string TARGET = "generic";
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@ -37,9 +37,9 @@ std::string PTXSubtarget::getTargetString() const {
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std::string PTXSubtarget::getPTXVersionString() const {
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switch(PTXVersion) {
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default: llvm_unreachable("Unknown PTX version");
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case PTX_VERSION_1_4: return "1.4";
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case PTX_VERSION_2_0: return "2.0";
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case PTX_VERSION_2_1: return "2.1";
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case PTX_VERSION_2_2: return "2.2";
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}
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}
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@ -19,16 +19,25 @@
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namespace llvm {
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class PTXSubtarget : public TargetSubtarget {
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private:
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/**
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* Enumeration of Shader Models supported by the back-end.
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*/
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enum PTXShaderModelEnum {
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PTX_SM_1_0,
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PTX_SM_1_3,
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PTX_SM_2_0
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PTX_SM_1_0, /*< Shader Model 1.0 */
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PTX_SM_1_3, /*< Shader Model 1.3 */
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PTX_SM_2_0 /*< Shader Model 2.0 */
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};
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/**
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* Enumeration of PTX versions supported by the back-end.
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*
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* Currently, PTX 2.0 is the minimum supported version.
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*/
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enum PTXVersionEnum {
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PTX_VERSION_1_4,
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PTX_VERSION_2_0,
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PTX_VERSION_2_1
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PTX_VERSION_2_0, /*< PTX Version 2.0 */
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PTX_VERSION_2_1, /*< PTX Version 2.1 */
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PTX_VERSION_2_2 /*< PTX Version 2.2 */
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};
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/// Shader Model supported on the target GPU.
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@ -58,10 +67,10 @@ namespace llvm {
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bool supportsSM20() const { return PTXShaderModel >= PTX_SM_2_0; }
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bool supportsPTX20() const { return PTXVersion >= PTX_VERSION_2_0; }
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bool supportsPTX21() const { return PTXVersion >= PTX_VERSION_2_1; }
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bool supportsPTX22() const { return PTXVersion >= PTX_VERSION_2_2; }
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std::string ParseSubtargetFeatures(const std::string &FS,
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const std::string &CPU);
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}; // class PTXSubtarget
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@ -1,59 +1,59 @@
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; RUN: llc < %s -march=ptx -mattr=+ptx20,+sm20 | FileCheck %s
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define ptx_device i16 @test_tid_x() {
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; CHECK: mov.u16 rh0, %tid.x;
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define ptx_device i32 @test_tid_x() {
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; CHECK: mov.u32 r0, %tid.x;
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; CHECK-NEXT: ret;
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%x = call i16 @llvm.ptx.read.tid.x()
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ret i16 %x
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%x = call i32 @llvm.ptx.read.tid.x()
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ret i32 %x
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}
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define ptx_device i16 @test_tid_y() {
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; CHECK: mov.u16 rh0, %tid.y;
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define ptx_device i32 @test_tid_y() {
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; CHECK: mov.u32 r0, %tid.y;
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; CHECK-NEXT: ret;
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%x = call i16 @llvm.ptx.read.tid.y()
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ret i16 %x
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%x = call i32 @llvm.ptx.read.tid.y()
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ret i32 %x
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}
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define ptx_device i16 @test_tid_z() {
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; CHECK: mov.u16 rh0, %tid.z;
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define ptx_device i32 @test_tid_z() {
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; CHECK: mov.u32 r0, %tid.z;
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; CHECK-NEXT: ret;
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%x = call i16 @llvm.ptx.read.tid.z()
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ret i16 %x
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%x = call i32 @llvm.ptx.read.tid.z()
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ret i32 %x
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}
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define ptx_device i16 @test_tid_w() {
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; CHECK: mov.u16 rh0, %tid.w;
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define ptx_device i32 @test_tid_w() {
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; CHECK: mov.u32 r0, %tid.w;
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; CHECK-NEXT: ret;
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%x = call i16 @llvm.ptx.read.tid.w()
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ret i16 %x
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%x = call i32 @llvm.ptx.read.tid.w()
|
||||
ret i32 %x
|
||||
}
|
||||
|
||||
define ptx_device i16 @test_ntid_x() {
|
||||
; CHECK: mov.u16 rh0, %ntid.x;
|
||||
define ptx_device i32 @test_ntid_x() {
|
||||
; CHECK: mov.u32 r0, %ntid.x;
|
||||
; CHECK-NEXT: ret;
|
||||
%x = call i16 @llvm.ptx.read.ntid.x()
|
||||
ret i16 %x
|
||||
%x = call i32 @llvm.ptx.read.ntid.x()
|
||||
ret i32 %x
|
||||
}
|
||||
|
||||
define ptx_device i16 @test_ntid_y() {
|
||||
; CHECK: mov.u16 rh0, %ntid.y;
|
||||
define ptx_device i32 @test_ntid_y() {
|
||||
; CHECK: mov.u32 r0, %ntid.y;
|
||||
; CHECK-NEXT: ret;
|
||||
%x = call i16 @llvm.ptx.read.ntid.y()
|
||||
ret i16 %x
|
||||
%x = call i32 @llvm.ptx.read.ntid.y()
|
||||
ret i32 %x
|
||||
}
|
||||
|
||||
define ptx_device i16 @test_ntid_z() {
|
||||
; CHECK: mov.u16 rh0, %ntid.z;
|
||||
define ptx_device i32 @test_ntid_z() {
|
||||
; CHECK: mov.u32 r0, %ntid.z;
|
||||
; CHECK-NEXT: ret;
|
||||
%x = call i16 @llvm.ptx.read.ntid.z()
|
||||
ret i16 %x
|
||||
%x = call i32 @llvm.ptx.read.ntid.z()
|
||||
ret i32 %x
|
||||
}
|
||||
|
||||
define ptx_device i16 @test_ntid_w() {
|
||||
; CHECK: mov.u16 rh0, %ntid.w;
|
||||
define ptx_device i32 @test_ntid_w() {
|
||||
; CHECK: mov.u32 r0, %ntid.w;
|
||||
; CHECK-NEXT: ret;
|
||||
%x = call i16 @llvm.ptx.read.ntid.w()
|
||||
ret i16 %x
|
||||
%x = call i32 @llvm.ptx.read.ntid.w()
|
||||
ret i32 %x
|
||||
}
|
||||
|
||||
define ptx_device i32 @test_laneid() {
|
||||
|
|
@ -77,60 +77,60 @@ define ptx_device i32 @test_nwarpid() {
|
|||
ret i32 %x
|
||||
}
|
||||
|
||||
define ptx_device i16 @test_ctaid_x() {
|
||||
; CHECK: mov.u16 rh0, %ctaid.x;
|
||||
define ptx_device i32 @test_ctaid_x() {
|
||||
; CHECK: mov.u32 r0, %ctaid.x;
|
||||
; CHECK-NEXT: ret;
|
||||
%x = call i16 @llvm.ptx.read.ctaid.x()
|
||||
ret i16 %x
|
||||
%x = call i32 @llvm.ptx.read.ctaid.x()
|
||||
ret i32 %x
|
||||
}
|
||||
|
||||
define ptx_device i16 @test_ctaid_y() {
|
||||
; CHECK: mov.u16 rh0, %ctaid.y;
|
||||
define ptx_device i32 @test_ctaid_y() {
|
||||
; CHECK: mov.u32 r0, %ctaid.y;
|
||||
; CHECK-NEXT: ret;
|
||||
%x = call i16 @llvm.ptx.read.ctaid.y()
|
||||
ret i16 %x
|
||||
%x = call i32 @llvm.ptx.read.ctaid.y()
|
||||
ret i32 %x
|
||||
}
|
||||
|
||||
define ptx_device i16 @test_ctaid_z() {
|
||||
; CHECK: mov.u16 rh0, %ctaid.z;
|
||||
define ptx_device i32 @test_ctaid_z() {
|
||||
; CHECK: mov.u32 r0, %ctaid.z;
|
||||
; CHECK-NEXT: ret;
|
||||
%x = call i16 @llvm.ptx.read.ctaid.z()
|
||||
ret i16 %x
|
||||
%x = call i32 @llvm.ptx.read.ctaid.z()
|
||||
ret i32 %x
|
||||
}
|
||||
|
||||
define ptx_device i16 @test_ctaid_w() {
|
||||
; CHECK: mov.u16 rh0, %ctaid.w;
|
||||
define ptx_device i32 @test_ctaid_w() {
|
||||
; CHECK: mov.u32 r0, %ctaid.w;
|
||||
; CHECK-NEXT: ret;
|
||||
%x = call i16 @llvm.ptx.read.ctaid.w()
|
||||
ret i16 %x
|
||||
%x = call i32 @llvm.ptx.read.ctaid.w()
|
||||
ret i32 %x
|
||||
}
|
||||
|
||||
define ptx_device i16 @test_nctaid_x() {
|
||||
; CHECK: mov.u16 rh0, %nctaid.x;
|
||||
define ptx_device i32 @test_nctaid_x() {
|
||||
; CHECK: mov.u32 r0, %nctaid.x;
|
||||
; CHECK-NEXT: ret;
|
||||
%x = call i16 @llvm.ptx.read.nctaid.x()
|
||||
ret i16 %x
|
||||
%x = call i32 @llvm.ptx.read.nctaid.x()
|
||||
ret i32 %x
|
||||
}
|
||||
|
||||
define ptx_device i16 @test_nctaid_y() {
|
||||
; CHECK: mov.u16 rh0, %nctaid.y;
|
||||
define ptx_device i32 @test_nctaid_y() {
|
||||
; CHECK: mov.u32 r0, %nctaid.y;
|
||||
; CHECK-NEXT: ret;
|
||||
%x = call i16 @llvm.ptx.read.nctaid.y()
|
||||
ret i16 %x
|
||||
%x = call i32 @llvm.ptx.read.nctaid.y()
|
||||
ret i32 %x
|
||||
}
|
||||
|
||||
define ptx_device i16 @test_nctaid_z() {
|
||||
; CHECK: mov.u16 rh0, %nctaid.z;
|
||||
define ptx_device i32 @test_nctaid_z() {
|
||||
; CHECK: mov.u32 r0, %nctaid.z;
|
||||
; CHECK-NEXT: ret;
|
||||
%x = call i16 @llvm.ptx.read.nctaid.z()
|
||||
ret i16 %x
|
||||
%x = call i32 @llvm.ptx.read.nctaid.z()
|
||||
ret i32 %x
|
||||
}
|
||||
|
||||
define ptx_device i16 @test_nctaid_w() {
|
||||
; CHECK: mov.u16 rh0, %nctaid.w;
|
||||
define ptx_device i32 @test_nctaid_w() {
|
||||
; CHECK: mov.u32 r0, %nctaid.w;
|
||||
; CHECK-NEXT: ret;
|
||||
%x = call i16 @llvm.ptx.read.nctaid.w()
|
||||
ret i16 %x
|
||||
%x = call i32 @llvm.ptx.read.nctaid.w()
|
||||
ret i32 %x
|
||||
}
|
||||
|
||||
define ptx_device i32 @test_smid() {
|
||||
|
|
@ -238,27 +238,27 @@ define ptx_device void @test_bar_sync() {
|
|||
ret void
|
||||
}
|
||||
|
||||
declare i16 @llvm.ptx.read.tid.x()
|
||||
declare i16 @llvm.ptx.read.tid.y()
|
||||
declare i16 @llvm.ptx.read.tid.z()
|
||||
declare i16 @llvm.ptx.read.tid.w()
|
||||
declare i16 @llvm.ptx.read.ntid.x()
|
||||
declare i16 @llvm.ptx.read.ntid.y()
|
||||
declare i16 @llvm.ptx.read.ntid.z()
|
||||
declare i16 @llvm.ptx.read.ntid.w()
|
||||
declare i32 @llvm.ptx.read.tid.x()
|
||||
declare i32 @llvm.ptx.read.tid.y()
|
||||
declare i32 @llvm.ptx.read.tid.z()
|
||||
declare i32 @llvm.ptx.read.tid.w()
|
||||
declare i32 @llvm.ptx.read.ntid.x()
|
||||
declare i32 @llvm.ptx.read.ntid.y()
|
||||
declare i32 @llvm.ptx.read.ntid.z()
|
||||
declare i32 @llvm.ptx.read.ntid.w()
|
||||
|
||||
declare i32 @llvm.ptx.read.laneid()
|
||||
declare i32 @llvm.ptx.read.warpid()
|
||||
declare i32 @llvm.ptx.read.nwarpid()
|
||||
|
||||
declare i16 @llvm.ptx.read.ctaid.x()
|
||||
declare i16 @llvm.ptx.read.ctaid.y()
|
||||
declare i16 @llvm.ptx.read.ctaid.z()
|
||||
declare i16 @llvm.ptx.read.ctaid.w()
|
||||
declare i16 @llvm.ptx.read.nctaid.x()
|
||||
declare i16 @llvm.ptx.read.nctaid.y()
|
||||
declare i16 @llvm.ptx.read.nctaid.z()
|
||||
declare i16 @llvm.ptx.read.nctaid.w()
|
||||
declare i32 @llvm.ptx.read.ctaid.x()
|
||||
declare i32 @llvm.ptx.read.ctaid.y()
|
||||
declare i32 @llvm.ptx.read.ctaid.z()
|
||||
declare i32 @llvm.ptx.read.ctaid.w()
|
||||
declare i32 @llvm.ptx.read.nctaid.x()
|
||||
declare i32 @llvm.ptx.read.nctaid.y()
|
||||
declare i32 @llvm.ptx.read.nctaid.z()
|
||||
declare i32 @llvm.ptx.read.nctaid.w()
|
||||
|
||||
declare i32 @llvm.ptx.read.smid()
|
||||
declare i32 @llvm.ptx.read.nsmid()
|
||||
|
|
|
|||
|
|
@ -1,8 +1,9 @@
|
|||
; RUN: llc < %s -march=ptx -mattr=ptx14 | grep ".version 1.4"
|
||||
; RUN: llc < %s -march=ptx -mattr=ptx20 | grep ".version 2.0"
|
||||
; RUN: llc < %s -march=ptx -mattr=ptx21 | grep ".version 2.1"
|
||||
; RUN: llc < %s -march=ptx -mattr=sm20 | grep ".target sm_20"
|
||||
; RUN: llc < %s -march=ptx -mattr=ptx22 | grep ".version 2.2"
|
||||
; RUN: llc < %s -march=ptx -mattr=sm10 | grep ".target sm_10"
|
||||
; RUN: llc < %s -march=ptx -mattr=sm13 | grep ".target sm_13"
|
||||
; RUN: llc < %s -march=ptx -mattr=sm20 | grep ".target sm_20"
|
||||
|
||||
define ptx_device void @t1() {
|
||||
ret void
|
||||
|
|
|
|||
Loading…
Reference in New Issue