forked from OSchip/llvm-project
[llvm-mca] Update tests for Exynos (NFC)
Update test cases for Exynos M4. llvm-svn: 350961
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# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py
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# RUN: llvm-mca -mtriple=aarch64-linux-gnu -mcpu=exynos-m1 -resource-pressure=false < %s | FileCheck %s -check-prefixes=ALL,M1
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# RUN: llvm-mca -mtriple=aarch64-linux-gnu -mcpu=exynos-m3 -resource-pressure=false < %s | FileCheck %s -check-prefixes=ALL,M3
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# RUN: llvm-mca -mtriple=aarch64-linux-gnu -mcpu=exynos-m4 -resource-pressure=false < %s | FileCheck %s -check-prefixes=ALL,M4
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b main
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@ -9,6 +10,7 @@
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# M1-NEXT: Total Cycles: 26
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# M3-NEXT: Total Cycles: 18
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# M4-NEXT: Total Cycles: 18
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# ALL-NEXT: Total uOps: 100
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@ -22,6 +24,11 @@
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# M3-NEXT: IPC: 5.56
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# M3-NEXT: Block RThroughput: 0.2
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# M4: Dispatch Width: 6
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# M4-NEXT: uOps Per Cycle: 5.56
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# M4-NEXT: IPC: 5.56
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# M4-NEXT: Block RThroughput: 0.2
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# ALL: Instruction Info:
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# ALL-NEXT: [1]: #uOps
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# ALL-NEXT: [2]: Latency
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@ -34,3 +41,4 @@
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# M1-NEXT: 1 0 0.25 b main
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# M3-NEXT: 1 0 0.17 b main
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# M4-NEXT: 1 0 0.17 b main
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# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py
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# RUN: llvm-mca -march=aarch64 -mcpu=exynos-m1 -resource-pressure=false < %s | FileCheck %s -check-prefixes=ALL,EM1
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# RUN: llvm-mca -march=aarch64 -mcpu=exynos-m3 -resource-pressure=false < %s | FileCheck %s -check-prefixes=ALL,EM3
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# RUN: llvm-mca -march=aarch64 -mcpu=exynos-m4 -resource-pressure=false < %s | FileCheck %s -check-prefixes=ALL,EM4
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sub w0, w1, w2, sxtb #0
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add x3, x4, w5, sxth #1
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# EM1-NEXT: Total Cycles: 403
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# EM3-NEXT: Total Cycles: 304
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# EM4-NEXT: Total Cycles: 304
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# ALL-NEXT: Total uOps: 800
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# EM3-NEXT: IPC: 2.63
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# EM3-NEXT: Block RThroughput: 3.0
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# EM4: Dispatch Width: 6
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# EM4-NEXT: uOps Per Cycle: 2.63
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# EM4-NEXT: IPC: 2.63
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# EM4-NEXT: Block RThroughput: 3.0
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# ALL: Instruction Info:
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# ALL-NEXT: [1]: #uOps
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# ALL-NEXT: [2]: Latency
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# EM3-NEXT: 1 2 0.50 add x15, x16, w17, uxth #1
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# EM3-NEXT: 1 2 0.50 subs x18, x19, w20, sxtw #2
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# EM3-NEXT: 1 2 0.50 adds x21, x22, x23, sxtx #3
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# EM4-NEXT: 1 1 0.25 sub w0, w1, w2, sxtb
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# EM4-NEXT: 1 2 0.50 add x3, x4, w5, sxth #1
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# EM4-NEXT: 1 1 0.25 subs x6, x7, w8, uxtw #2
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# EM4-NEXT: 1 1 0.25 adds x9, x10, x11, uxtx #3
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# EM4-NEXT: 1 1 0.25 sub w12, w13, w14, uxtb
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# EM4-NEXT: 1 2 0.50 add x15, x16, w17, uxth #1
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# EM4-NEXT: 1 2 0.50 subs x18, x19, w20, sxtw #2
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# EM4-NEXT: 1 2 0.50 adds x21, x22, x23, sxtx #3
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# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py
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# RUN: llvm-mca -march=aarch64 -mcpu=exynos-m1 -iterations=1 -scheduler-stats -resource-pressure=false -instruction-info=false < %s | FileCheck %s -check-prefixes=ALL,M1
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# RUN: llvm-mca -march=aarch64 -mcpu=exynos-m3 -iterations=1 -scheduler-stats -resource-pressure=false -instruction-info=false < %s | FileCheck %s -check-prefixes=ALL,M3
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# RUN: llvm-mca -march=aarch64 -mcpu=exynos-m4 -iterations=1 -scheduler-stats -resource-pressure=false -instruction-info=false < %s | FileCheck %s -check-prefixes=ALL,M4
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b main
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# M3-NEXT: IPC: 0.50
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# M3-NEXT: Block RThroughput: 0.2
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# M4: Dispatch Width: 6
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# M4-NEXT: uOps Per Cycle: 0.50
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# M4-NEXT: IPC: 0.50
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# M4-NEXT: Block RThroughput: 0.2
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# ALL: Schedulers - number of cycles where we saw N instructions issued:
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# ALL-NEXT: [# issued], [# cycles]
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# ALL-NEXT: 0, 1 (50.0%)
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# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py
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# RUN: llvm-mca -march=aarch64 -mcpu=exynos-m1 -resource-pressure=false < %s | FileCheck %s -check-prefixes=ALL,EM1
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# RUN: llvm-mca -march=aarch64 -mcpu=exynos-m3 -resource-pressure=false < %s | FileCheck %s -check-prefixes=ALL,EM3
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# RUN: llvm-mca -march=aarch64 -mcpu=exynos-m4 -resource-pressure=false < %s | FileCheck %s -check-prefixes=ALL,EM4
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adds w0, w1, w2, lsl #0
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sub x3, x4, x5, lsr #1
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# EM1-NEXT: Total Cycles: 470
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# EM3-NEXT: Total Cycles: 354
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# EM4-NEXT: Total Cycles: 329
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# ALL-NEXT: Total uOps: 800
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# EM3-NEXT: IPC: 2.26
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# EM3-NEXT: Block RThroughput: 3.5
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# EM4: Dispatch Width: 6
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# EM4-NEXT: uOps Per Cycle: 2.43
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# EM4-NEXT: IPC: 2.43
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# EM4-NEXT: Block RThroughput: 3.3
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# ALL: Instruction Info:
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# ALL-NEXT: [1]: #uOps
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# ALL-NEXT: [2]: Latency
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# EM3-NEXT: 1 2 0.50 sub x15, x16, x17, lsr #6
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# EM3-NEXT: 1 2 0.50 ands x18, x19, x20, lsl #8
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# EM3-NEXT: 1 2 0.50 orr w21, w22, w23, asr #10
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# EM4-NEXT: 1 1 0.25 adds w0, w1, w2
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# EM4-NEXT: 1 2 0.50 sub x3, x4, x5, lsr #1
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# EM4-NEXT: 1 1 0.25 ands x6, x7, x8, lsl #2
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# EM4-NEXT: 1 2 0.50 orr w9, w10, w11, asr #3
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# EM4-NEXT: 1 2 0.50 adds w12, w13, w14, lsl #4
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# EM4-NEXT: 1 2 0.50 sub x15, x16, x17, lsr #6
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# EM4-NEXT: 1 1 0.25 ands x18, x19, x20, lsl #8
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# EM4-NEXT: 1 2 0.50 orr w21, w22, w23, asr #10
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