forked from OSchip/llvm-project
When trying to fold X86::SETCC into a Select, make a copy if it has more than
one use. This allows more CMOV instructions. llvm-svn: 25634
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@ -1669,9 +1669,17 @@ SDOperand X86TargetLowering::LowerOperation(SDOperand Op, SelectionDAG &DAG) {
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// If the X86ISD::SETCC has more than one use, then it's probably better
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// to use a test instead of duplicating the X86ISD::CMP (for register
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// pressure reason).
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// FIXME: Check number of live Op0 uses since we are in the middle of
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// legalization process.
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if (Op0.hasOneUse() && Op0.getOperand(1).getOpcode() == X86ISD::CMP) {
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if (Op0.getOperand(1).getOpcode() == X86ISD::CMP) {
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if (!Op0.hasOneUse()) {
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std::vector<MVT::ValueType> Tys;
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for (unsigned i = 0; i < Op0.Val->getNumValues(); ++i)
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Tys.push_back(Op0.Val->getValueType(i));
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std::vector<SDOperand> Ops;
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for (unsigned i = 0; i < Op0.getNumOperands(); ++i)
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Ops.push_back(Op0.getOperand(i));
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Op0 = DAG.getNode(X86ISD::SETCC, Tys, Ops);
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}
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CC = Op0.getOperand(0);
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Cond = Op0.getOperand(1);
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// Make a copy as flag result cannot be used by more than one.
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@ -1720,9 +1728,17 @@ SDOperand X86TargetLowering::LowerOperation(SDOperand Op, SelectionDAG &DAG) {
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// If the X86ISD::SETCC has more than one use, then it's probably better
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// to use a test instead of duplicating the X86ISD::CMP (for register
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// pressure reason).
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// FIXME: Check number of live Cond uses since we are in the middle of
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// legalization process.
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if (Cond.hasOneUse() && Cond.getOperand(1).getOpcode() == X86ISD::CMP) {
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if (Cond.getOperand(1).getOpcode() == X86ISD::CMP) {
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if (!Cond.hasOneUse()) {
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std::vector<MVT::ValueType> Tys;
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for (unsigned i = 0; i < Cond.Val->getNumValues(); ++i)
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Tys.push_back(Cond.Val->getValueType(i));
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std::vector<SDOperand> Ops;
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for (unsigned i = 0; i < Cond.getNumOperands(); ++i)
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Ops.push_back(Cond.getOperand(i));
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Cond = DAG.getNode(X86ISD::SETCC, Tys, Ops);
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}
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CC = Cond.getOperand(0);
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Cond = Cond.getOperand(1);
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// Make a copy as flag result cannot be used by more than one.
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