[AArch64][GlobalISel] Enable copy elision in the pre-legalizer combine and fix a crash.

This enables the simple copy combine that already exists in the CombinerHelper.
However, it exposed a bug in the GISelChangeObserver where it wouldn't clear a
set of MIs to process, and so would end up causing a crash when deleted MIs were
being added to the combiner worklist again.

Differential Revision: https://reviews.llvm.org/D60579

llvm-svn: 358318

llvm/lib/CodeGen/GlobalISel/GISelChangeObserver.cpp

@@ -26,6 +26,7 @@ void GISelChangeObserver::changingAllUsesOfReg(
 void GISelChangeObserver::finishedChangingAllUsesOfReg() {
   for (auto *ChangedMI : ChangingAllUsesOfReg)
     changedInstr(*ChangedMI);
+  ChangingAllUsesOfReg.clear();
 }
 
 RAIIDelegateInstaller::RAIIDelegateInstaller(MachineFunction &MF,

llvm/lib/Target/AArch64/AArch64PreLegalizerCombiner.cpp

@@ -43,6 +43,8 @@ bool AArch64PreLegalizerCombinerInfo::combine(GISelChangeObserver &Observer,
   switch (MI.getOpcode()) {
   default:
     return false;
+  case TargetOpcode::COPY:
+    return Helper.tryCombineCopy(MI);
   case TargetOpcode::G_LOAD:
   case TargetOpcode::G_SEXTLOAD:
   case TargetOpcode::G_ZEXTLOAD:

llvm/test/CodeGen/AArch64/GlobalISel/observer-change-crash.mir

@@ -0,0 +1,32 @@
+# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
+# RUN: llc -mtriple aarch64 -run-pass=aarch64-prelegalizer-combiner %s -o - | FileCheck %s
+--- |
+  target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128"
+  target triple = "arm64-apple-ios5.0.0"
+
+  define void @test() {
+    ret void
+  }
+
+...
+---
+name:            test
+alignment:       2
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: _ }
+  - { id: 1, class: _ }
+  - { id: 2, class: _ }
+frameInfo:
+  maxCallFrameSize: 0
+body:             |
+  bb.0:
+    ; CHECK-LABEL: name: test
+    ; CHECK: [[DEF:%[0-9]+]]:_(p0) = G_IMPLICIT_DEF
+    ; CHECK: $x0 = COPY [[DEF]](p0)
+    %0:_(p0) = G_IMPLICIT_DEF
+    %1:_(p0) = COPY %0(p0)
+    %2:_(p0) = COPY %1(p0)
+    $x0 = COPY %2(p0)
+
+...