forked from OSchip/llvm-project
LivePhysRegs: Fix live-outs of return blocks
I realized that the live-out set computed for the return block is missing the callee saved registers (the non-pristine ones to be exact). This only affects the liveness computed for instructions inside the function epilogue which currently none of the LivePhysRegs users in llvm cares about, so this is just a drive-by fix without a testcase. Differential Revision: http://reviews.llvm.org/D13180 llvm-svn: 248636
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@ -122,9 +122,9 @@ public:
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void addLiveIns(const MachineBasicBlock *MBB, bool AddPristines = false);
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/// \brief Adds all live-out registers of basic block @p MBB; After prologue/
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/// epilogue insertion \p AddPristines should be set to true to insert the
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/// pristine registers.
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void addLiveOuts(const MachineBasicBlock *MBB, bool AddPristines = false);
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/// epilogue insertion \p AddPristinesAndCSRs should be set to true.
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void addLiveOuts(const MachineBasicBlock *MBB,
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bool AddPristinesAndCSRs = false);
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typedef SparseSet<unsigned>::const_iterator const_iterator;
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const_iterator begin() const { return LiveRegs.begin(); }
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@ -147,11 +147,19 @@ static void addPristines(LivePhysRegs &LiveRegs, const MachineFunction &MF,
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}
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void LivePhysRegs::addLiveOuts(const MachineBasicBlock *MBB,
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bool AddPristines) {
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if (AddPristines) {
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bool AddPristinesAndCSRs) {
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if (AddPristinesAndCSRs) {
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const MachineFunction &MF = *MBB->getParent();
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addPristines(*this, MF, *TRI);
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if (!MBB->isReturnBlock()) {
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// The return block has no successors whose live-ins we could merge
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// below. So instead we add the callee saved registers manually.
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for (const MCPhysReg *I = TRI->getCalleeSavedRegs(&MF); *I; ++I)
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addReg(*I);
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}
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}
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// To get the live-outs we simply merge the live-ins of all successors.
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for (const MachineBasicBlock *Succ : MBB->successors())
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::addLiveIns(*this, *Succ);
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}
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