From 93a7d2aa3c5ae78252d1ade1ff31ba69ada97915 Mon Sep 17 00:00:00 2001 From: Amaury Sechet Date: Mon, 4 Jun 2018 18:36:22 +0000 Subject: [PATCH] Get rid of SETCCE Summary: It has been deprecated in favor of SETCCCARRY for a year now and isn't used by any in tree backend. Reviewers: efriedma, craig.topper, dblaikie, bkramer Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D47685 llvm-svn: 333939 --- llvm/docs/ReleaseNotes.rst | 2 + llvm/include/llvm/CodeGen/ISDOpcodes.h | 9 ---- llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp | 15 ------- llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp | 3 +- .../SelectionDAG/LegalizeIntegerTypes.cpp | 44 +++++-------------- llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.h | 1 - .../SelectionDAG/SelectionDAGDumper.cpp | 1 - 7 files changed, 14 insertions(+), 61 deletions(-) diff --git a/llvm/docs/ReleaseNotes.rst b/llvm/docs/ReleaseNotes.rst index 1784f8b90914..2d96f4d49f04 100644 --- a/llvm/docs/ReleaseNotes.rst +++ b/llvm/docs/ReleaseNotes.rst @@ -173,6 +173,8 @@ Changes to the DAG infrastructure using ``setOperationAction`` in their ``TargetLowering``. New backends should use UADDO/ADDCARRY/USUBO/SUBCARRY instead of the deprecated opcodes. +* The SETCCE opcode has now been removed in favor of SETCCCARRY. + External Open Source Projects Using LLVM 7 ========================================== diff --git a/llvm/include/llvm/CodeGen/ISDOpcodes.h b/llvm/include/llvm/CodeGen/ISDOpcodes.h index df0dcb1cf041..14084e6e1bff 100644 --- a/llvm/include/llvm/CodeGen/ISDOpcodes.h +++ b/llvm/include/llvm/CodeGen/ISDOpcodes.h @@ -412,15 +412,6 @@ namespace ISD { /// then the result type must also be a vector type. SETCC, - /// Like SetCC, ops #0 and #1 are the LHS and RHS operands to compare, and - /// op #2 is a *carry value*. This operator checks the result of - /// "LHS - RHS - Carry", and can be used to compare two wide integers: - /// (setcce lhshi rhshi (subc lhslo rhslo) cc). Only valid for integers. - /// FIXME: This node is deprecated in favor of SETCCCARRY. - /// It is kept around for now to provide a smooth transition path - /// toward the use of SETCCCARRY and will eventually be removed. - SETCCE, - /// Like SetCC, ops #0 and #1 are the LHS and RHS operands to compare, but /// op #2 is a boolean indicating if there is an incoming carry. This /// operator checks the result of "LHS - RHS - Carry", and can be used to diff --git a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp index 13d71e08bc39..413583f5c1a9 100644 --- a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp +++ b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp @@ -329,7 +329,6 @@ namespace { SDValue visitVSELECT(SDNode *N); SDValue visitSELECT_CC(SDNode *N); SDValue visitSETCC(SDNode *N); - SDValue visitSETCCE(SDNode *N); SDValue visitSETCCCARRY(SDNode *N); SDValue visitSIGN_EXTEND(SDNode *N); SDValue visitZERO_EXTEND(SDNode *N); @@ -1538,7 +1537,6 @@ SDValue DAGCombiner::visit(SDNode *N) { case ISD::VSELECT: return visitVSELECT(N); case ISD::SELECT_CC: return visitSELECT_CC(N); case ISD::SETCC: return visitSETCC(N); - case ISD::SETCCE: return visitSETCCE(N); case ISD::SETCCCARRY: return visitSETCCCARRY(N); case ISD::SIGN_EXTEND: return visitSIGN_EXTEND(N); case ISD::ZERO_EXTEND: return visitZERO_EXTEND(N); @@ -7359,19 +7357,6 @@ SDValue DAGCombiner::visitSETCC(SDNode *N) { return Combined; } -SDValue DAGCombiner::visitSETCCE(SDNode *N) { - SDValue LHS = N->getOperand(0); - SDValue RHS = N->getOperand(1); - SDValue Carry = N->getOperand(2); - SDValue Cond = N->getOperand(3); - - // If Carry is false, fold to a regular SETCC. - if (Carry.getOpcode() == ISD::CARRY_FALSE) - return DAG.getNode(ISD::SETCC, SDLoc(N), N->getVTList(), LHS, RHS, Cond); - - return SDValue(); -} - SDValue DAGCombiner::visitSETCCCARRY(SDNode *N) { SDValue LHS = N->getOperand(0); SDValue RHS = N->getOperand(1); diff --git a/llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp b/llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp index feb678192018..4fe55f790d4b 100644 --- a/llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp +++ b/llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp @@ -1012,8 +1012,7 @@ void SelectionDAGLegalize::LegalizeOp(SDNode *Node) { case ISD::SETCC: case ISD::BR_CC: { unsigned CCOperand = Node->getOpcode() == ISD::SELECT_CC ? 4 : - Node->getOpcode() == ISD::SETCC ? 2 : - Node->getOpcode() == ISD::SETCCE ? 3 : 1; + Node->getOpcode() == ISD::SETCC ? 2 : 1; unsigned CompareOperand = Node->getOpcode() == ISD::BR_CC ? 2 : 0; MVT OpVT = Node->getOperand(CompareOperand).getSimpleValueType(); ISD::CondCode CCCode = diff --git a/llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp b/llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp index e6d8b0491ecb..63a1ea13a5f5 100644 --- a/llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp +++ b/llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp @@ -2913,7 +2913,6 @@ bool DAGTypeLegalizer::ExpandIntegerOperand(SDNode *N, unsigned OpNo) { case ISD::SCALAR_TO_VECTOR: Res = ExpandOp_SCALAR_TO_VECTOR(N); break; case ISD::SELECT_CC: Res = ExpandIntOp_SELECT_CC(N); break; case ISD::SETCC: Res = ExpandIntOp_SETCC(N); break; - case ISD::SETCCE: Res = ExpandIntOp_SETCCE(N); break; case ISD::SETCCCARRY: Res = ExpandIntOp_SETCCCARRY(N); break; case ISD::SINT_TO_FP: Res = ExpandIntOp_SINT_TO_FP(N); break; case ISD::STORE: Res = ExpandIntOp_STORE(cast(N), OpNo); break; @@ -3049,15 +3048,14 @@ void DAGTypeLegalizer::IntegerExpandSetCCOperands(SDValue &NewLHS, return; } - // Lower with SETCCE or SETCCCARRY if the target supports it. + // Lower with SETCCCARRY if the target supports it. EVT HiVT = LHSHi.getValueType(); EVT ExpandVT = TLI.getTypeToExpandTo(*DAG.getContext(), HiVT); bool HasSETCCCARRY = TLI.isOperationLegalOrCustom(ISD::SETCCCARRY, ExpandVT); // FIXME: Make all targets support this, then remove the other lowering. - if (HasSETCCCARRY || - TLI.getOperationAction(ISD::SETCCE, ExpandVT) == TargetLowering::Custom) { - // SETCCE/SETCCCARRY can detect < and >= directly. For > and <=, flip + if (HasSETCCCARRY) { + // SETCCCARRY can detect < and >= directly. For > and <=, flip // operands and condition code. bool FlipOperands = false; switch (CCCode) { @@ -3072,17 +3070,15 @@ void DAGTypeLegalizer::IntegerExpandSetCCOperands(SDValue &NewLHS, std::swap(LHSHi, RHSHi); } // Perform a wide subtraction, feeding the carry from the low part into - // SETCCE/SETCCCARRY. The SETCCE/SETCCCARRY operation is essentially - // looking at the high part of the result of LHS - RHS. It is negative - // iff LHS < RHS. It is zero or positive iff LHS >= RHS. + // SETCCCARRY. The SETCCCARRY operation is essentially looking at the high + // part of the result of LHS - RHS. It is negative iff LHS < RHS. It is + // zero or positive iff LHS >= RHS. EVT LoVT = LHSLo.getValueType(); - SDVTList VTList = DAG.getVTList( - LoVT, HasSETCCCARRY ? getSetCCResultType(LoVT) : MVT::Glue); - SDValue LowCmp = DAG.getNode(HasSETCCCARRY ? ISD::USUBO : ISD::SUBC, dl, - VTList, LHSLo, RHSLo); - SDValue Res = DAG.getNode(HasSETCCCARRY ? ISD::SETCCCARRY : ISD::SETCCE, dl, - getSetCCResultType(HiVT), LHSHi, RHSHi, - LowCmp.getValue(1), DAG.getCondCode(CCCode)); + SDVTList VTList = DAG.getVTList(LoVT, getSetCCResultType(LoVT)); + SDValue LowCmp = DAG.getNode(ISD::USUBO, dl, VTList, LHSLo, RHSLo); + SDValue Res = DAG.getNode(ISD::SETCCCARRY, dl, getSetCCResultType(HiVT), + LHSHi, RHSHi, LowCmp.getValue(1), + DAG.getCondCode(CCCode)); NewLHS = Res; NewRHS = SDValue(); return; @@ -3150,24 +3146,6 @@ SDValue DAGTypeLegalizer::ExpandIntOp_SETCC(SDNode *N) { DAG.UpdateNodeOperands(N, NewLHS, NewRHS, DAG.getCondCode(CCCode)), 0); } -SDValue DAGTypeLegalizer::ExpandIntOp_SETCCE(SDNode *N) { - SDValue LHS = N->getOperand(0); - SDValue RHS = N->getOperand(1); - SDValue Carry = N->getOperand(2); - SDValue Cond = N->getOperand(3); - SDLoc dl = SDLoc(N); - - SDValue LHSLo, LHSHi, RHSLo, RHSHi; - GetExpandedInteger(LHS, LHSLo, LHSHi); - GetExpandedInteger(RHS, RHSLo, RHSHi); - - // Expand to a SUBE for the low part and a smaller SETCCE for the high. - SDVTList VTList = DAG.getVTList(LHSLo.getValueType(), MVT::Glue); - SDValue LowCmp = DAG.getNode(ISD::SUBE, dl, VTList, LHSLo, RHSLo, Carry); - return DAG.getNode(ISD::SETCCE, dl, N->getValueType(0), LHSHi, RHSHi, - LowCmp.getValue(1), Cond); -} - SDValue DAGTypeLegalizer::ExpandIntOp_SETCCCARRY(SDNode *N) { SDValue LHS = N->getOperand(0); SDValue RHS = N->getOperand(1); diff --git a/llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.h b/llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.h index 64cb80e0d853..56dc5583d270 100644 --- a/llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.h +++ b/llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.h @@ -377,7 +377,6 @@ private: SDValue ExpandIntOp_BR_CC(SDNode *N); SDValue ExpandIntOp_SELECT_CC(SDNode *N); SDValue ExpandIntOp_SETCC(SDNode *N); - SDValue ExpandIntOp_SETCCE(SDNode *N); SDValue ExpandIntOp_SETCCCARRY(SDNode *N); SDValue ExpandIntOp_Shift(SDNode *N); SDValue ExpandIntOp_SINT_TO_FP(SDNode *N); diff --git a/llvm/lib/CodeGen/SelectionDAG/SelectionDAGDumper.cpp b/llvm/lib/CodeGen/SelectionDAG/SelectionDAGDumper.cpp index cfe8ed016145..fa341e8b5fa5 100644 --- a/llvm/lib/CodeGen/SelectionDAG/SelectionDAGDumper.cpp +++ b/llvm/lib/CodeGen/SelectionDAG/SelectionDAGDumper.cpp @@ -252,7 +252,6 @@ std::string SDNode::getOperationName(const SelectionDAG *G) const { case ISD::FPOWI: return "fpowi"; case ISD::STRICT_FPOWI: return "strict_fpowi"; case ISD::SETCC: return "setcc"; - case ISD::SETCCE: return "setcce"; case ISD::SETCCCARRY: return "setcccarry"; case ISD::SELECT: return "select"; case ISD::VSELECT: return "vselect";