forked from OSchip/llvm-project
llgs-tests: Fix r325511 for debugserver
Debugserver sends the thread-pcs field with leading zeroes omitted. Teach parseRegisterValue to pad these as necessary. llvm-svn: 325701
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@ -203,7 +203,15 @@ Expected<RegisterInfo> RegisterInfoParser::create(StringRef Response) {
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Expected<RegisterValue> parseRegisterValue(const RegisterInfo &Info,
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StringRef HexValue,
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llvm::support::endianness Endian) {
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llvm::support::endianness Endian,
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bool ZeroPad) {
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SmallString<128> Storage;
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if (ZeroPad && HexValue.size() < Info.byte_size * 2) {
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Storage.insert(Storage.begin(), Info.byte_size * 2 - HexValue.size(), '0');
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Storage += HexValue;
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HexValue = Storage;
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}
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SmallVector<uint8_t, 64> Bytes(HexValue.size() / 2);
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StringExtractor(HexValue).GetHexBytes(Bytes, '\xcc');
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RegisterValue Value;
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@ -301,7 +309,8 @@ StopReplyStop::create(StringRef Response, support::endianness Endian,
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return make_parsing_error("StopReply: Thread id '{0}'",
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std::get<0>(ThreadPc));
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auto PcOr = parseRegisterValue(*PcInfo, std::get<1>(ThreadPc), Endian);
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auto PcOr = parseRegisterValue(*PcInfo, std::get<1>(ThreadPc), Endian,
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/*ZeroPad*/ true);
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if (!PcOr)
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return PcOr.takeError();
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ThreadPcs[Id] = std::move(*PcOr);
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@ -87,7 +87,8 @@ struct RegisterInfoParser : public Parser<lldb_private::RegisterInfo> {
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llvm::Expected<lldb_private::RegisterValue>
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parseRegisterValue(const lldb_private::RegisterInfo &Info,
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llvm::StringRef HexValue, llvm::support::endianness Endian);
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llvm::StringRef HexValue, llvm::support::endianness Endian,
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bool ZeroPad = false);
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class StopReply {
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public:
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