forked from OSchip/llvm-project
[X86][SSE] Add sdiv by (nonuniform) minus one tests (PR37119)
Test cases from D45806 llvm-svn: 335376
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@ -4044,3 +4044,300 @@ define <4 x i32> @combine_vec_sdiv_by_pow2b_undef3(<4 x i32> %x) {
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%1 = sdiv <4 x i32> %x, <i32 undef, i32 -4, i32 undef, i32 16>
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%1 = sdiv <4 x i32> %x, <i32 undef, i32 -4, i32 undef, i32 16>
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ret <4 x i32> %1
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ret <4 x i32> %1
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}
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}
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; PR37119
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define <16 x i8> @non_splat_minus_one_divisor_0(<16 x i8> %A) {
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; SSE-LABEL: non_splat_minus_one_divisor_0:
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; SSE: # %bb.0:
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; SSE-NEXT: pextrb $1, %xmm0, %eax
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; SSE-NEXT: negb %al
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; SSE-NEXT: movzbl %al, %eax
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; SSE-NEXT: pextrb $0, %xmm0, %ecx
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; SSE-NEXT: negb %cl
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; SSE-NEXT: movzbl %cl, %ecx
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; SSE-NEXT: movd %ecx, %xmm1
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; SSE-NEXT: pinsrb $1, %eax, %xmm1
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; SSE-NEXT: pextrb $2, %xmm0, %eax
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; SSE-NEXT: pinsrb $2, %eax, %xmm1
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; SSE-NEXT: pextrb $3, %xmm0, %eax
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; SSE-NEXT: negb %al
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; SSE-NEXT: movzbl %al, %eax
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; SSE-NEXT: pinsrb $3, %eax, %xmm1
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; SSE-NEXT: pextrb $4, %xmm0, %eax
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; SSE-NEXT: negb %al
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; SSE-NEXT: movzbl %al, %eax
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; SSE-NEXT: pinsrb $4, %eax, %xmm1
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; SSE-NEXT: pextrb $5, %xmm0, %eax
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; SSE-NEXT: negb %al
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; SSE-NEXT: movzbl %al, %eax
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; SSE-NEXT: pinsrb $5, %eax, %xmm1
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; SSE-NEXT: pextrb $6, %xmm0, %eax
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; SSE-NEXT: pinsrb $6, %eax, %xmm1
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; SSE-NEXT: pextrb $7, %xmm0, %eax
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; SSE-NEXT: negb %al
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; SSE-NEXT: movzbl %al, %eax
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; SSE-NEXT: pinsrb $7, %eax, %xmm1
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; SSE-NEXT: pextrb $8, %xmm0, %eax
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; SSE-NEXT: negb %al
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; SSE-NEXT: movzbl %al, %eax
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; SSE-NEXT: pinsrb $8, %eax, %xmm1
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; SSE-NEXT: pextrb $9, %xmm0, %eax
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; SSE-NEXT: pinsrb $9, %eax, %xmm1
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; SSE-NEXT: pblendw {{.*#+}} xmm0 = xmm1[0,1,2,3,4],xmm0[5,6,7]
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; SSE-NEXT: retq
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;
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; AVX1-LABEL: non_splat_minus_one_divisor_0:
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; AVX1: # %bb.0:
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; AVX1-NEXT: vpextrb $1, %xmm0, %eax
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; AVX1-NEXT: negb %al
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; AVX1-NEXT: movzbl %al, %eax
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; AVX1-NEXT: vpextrb $0, %xmm0, %ecx
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; AVX1-NEXT: negb %cl
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; AVX1-NEXT: movzbl %cl, %ecx
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; AVX1-NEXT: vmovd %ecx, %xmm1
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; AVX1-NEXT: vpinsrb $1, %eax, %xmm1, %xmm1
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; AVX1-NEXT: vpextrb $2, %xmm0, %eax
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; AVX1-NEXT: vpinsrb $2, %eax, %xmm1, %xmm1
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; AVX1-NEXT: vpextrb $3, %xmm0, %eax
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; AVX1-NEXT: negb %al
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; AVX1-NEXT: movzbl %al, %eax
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; AVX1-NEXT: vpinsrb $3, %eax, %xmm1, %xmm1
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; AVX1-NEXT: vpextrb $4, %xmm0, %eax
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; AVX1-NEXT: negb %al
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; AVX1-NEXT: movzbl %al, %eax
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; AVX1-NEXT: vpinsrb $4, %eax, %xmm1, %xmm1
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; AVX1-NEXT: vpextrb $5, %xmm0, %eax
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; AVX1-NEXT: negb %al
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; AVX1-NEXT: movzbl %al, %eax
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; AVX1-NEXT: vpinsrb $5, %eax, %xmm1, %xmm1
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; AVX1-NEXT: vpextrb $6, %xmm0, %eax
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; AVX1-NEXT: vpinsrb $6, %eax, %xmm1, %xmm1
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; AVX1-NEXT: vpextrb $7, %xmm0, %eax
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; AVX1-NEXT: negb %al
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; AVX1-NEXT: movzbl %al, %eax
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; AVX1-NEXT: vpinsrb $7, %eax, %xmm1, %xmm1
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; AVX1-NEXT: vpextrb $8, %xmm0, %eax
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; AVX1-NEXT: negb %al
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; AVX1-NEXT: movzbl %al, %eax
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; AVX1-NEXT: vpinsrb $8, %eax, %xmm1, %xmm1
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; AVX1-NEXT: vpextrb $9, %xmm0, %eax
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; AVX1-NEXT: vpinsrb $9, %eax, %xmm1, %xmm1
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; AVX1-NEXT: vpblendw {{.*#+}} xmm0 = xmm1[0,1,2,3,4],xmm0[5,6,7]
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; AVX1-NEXT: retq
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;
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; AVX2-LABEL: non_splat_minus_one_divisor_0:
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; AVX2: # %bb.0:
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; AVX2-NEXT: vpextrb $1, %xmm0, %eax
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; AVX2-NEXT: negb %al
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; AVX2-NEXT: movzbl %al, %eax
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; AVX2-NEXT: vpextrb $0, %xmm0, %ecx
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; AVX2-NEXT: negb %cl
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; AVX2-NEXT: movzbl %cl, %ecx
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; AVX2-NEXT: vmovd %ecx, %xmm1
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; AVX2-NEXT: vpinsrb $1, %eax, %xmm1, %xmm1
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; AVX2-NEXT: vpextrb $2, %xmm0, %eax
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; AVX2-NEXT: vpinsrb $2, %eax, %xmm1, %xmm1
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; AVX2-NEXT: vpextrb $3, %xmm0, %eax
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; AVX2-NEXT: negb %al
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; AVX2-NEXT: movzbl %al, %eax
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; AVX2-NEXT: vpinsrb $3, %eax, %xmm1, %xmm1
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; AVX2-NEXT: vpextrb $4, %xmm0, %eax
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; AVX2-NEXT: negb %al
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; AVX2-NEXT: movzbl %al, %eax
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; AVX2-NEXT: vpinsrb $4, %eax, %xmm1, %xmm1
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; AVX2-NEXT: vpextrb $5, %xmm0, %eax
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; AVX2-NEXT: negb %al
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; AVX2-NEXT: movzbl %al, %eax
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; AVX2-NEXT: vpinsrb $5, %eax, %xmm1, %xmm1
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; AVX2-NEXT: vpextrb $6, %xmm0, %eax
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; AVX2-NEXT: vpinsrb $6, %eax, %xmm1, %xmm1
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; AVX2-NEXT: vpextrb $7, %xmm0, %eax
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; AVX2-NEXT: negb %al
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; AVX2-NEXT: movzbl %al, %eax
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; AVX2-NEXT: vpinsrb $7, %eax, %xmm1, %xmm1
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; AVX2-NEXT: vpextrb $8, %xmm0, %eax
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; AVX2-NEXT: negb %al
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; AVX2-NEXT: movzbl %al, %eax
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; AVX2-NEXT: vpinsrb $8, %eax, %xmm1, %xmm1
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; AVX2-NEXT: vpextrb $9, %xmm0, %eax
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; AVX2-NEXT: vpinsrb $9, %eax, %xmm1, %xmm1
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; AVX2-NEXT: vpblendw {{.*#+}} xmm0 = xmm1[0,1,2,3,4],xmm0[5,6,7]
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; AVX2-NEXT: retq
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;
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; AVX512F-LABEL: non_splat_minus_one_divisor_0:
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; AVX512F: # %bb.0:
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; AVX512F-NEXT: vpextrb $1, %xmm0, %eax
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; AVX512F-NEXT: negb %al
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; AVX512F-NEXT: movzbl %al, %eax
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; AVX512F-NEXT: vpextrb $0, %xmm0, %ecx
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; AVX512F-NEXT: negb %cl
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; AVX512F-NEXT: movzbl %cl, %ecx
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; AVX512F-NEXT: vmovd %ecx, %xmm1
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; AVX512F-NEXT: vpinsrb $1, %eax, %xmm1, %xmm1
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; AVX512F-NEXT: vpextrb $2, %xmm0, %eax
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; AVX512F-NEXT: vpinsrb $2, %eax, %xmm1, %xmm1
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; AVX512F-NEXT: vpextrb $3, %xmm0, %eax
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; AVX512F-NEXT: negb %al
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; AVX512F-NEXT: movzbl %al, %eax
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; AVX512F-NEXT: vpinsrb $3, %eax, %xmm1, %xmm1
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; AVX512F-NEXT: vpextrb $4, %xmm0, %eax
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; AVX512F-NEXT: negb %al
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; AVX512F-NEXT: movzbl %al, %eax
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; AVX512F-NEXT: vpinsrb $4, %eax, %xmm1, %xmm1
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; AVX512F-NEXT: vpextrb $5, %xmm0, %eax
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; AVX512F-NEXT: negb %al
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; AVX512F-NEXT: movzbl %al, %eax
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; AVX512F-NEXT: vpinsrb $5, %eax, %xmm1, %xmm1
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; AVX512F-NEXT: vpextrb $6, %xmm0, %eax
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; AVX512F-NEXT: vpinsrb $6, %eax, %xmm1, %xmm1
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; AVX512F-NEXT: vpextrb $7, %xmm0, %eax
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; AVX512F-NEXT: negb %al
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; AVX512F-NEXT: movzbl %al, %eax
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; AVX512F-NEXT: vpinsrb $7, %eax, %xmm1, %xmm1
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; AVX512F-NEXT: vpextrb $8, %xmm0, %eax
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; AVX512F-NEXT: negb %al
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; AVX512F-NEXT: movzbl %al, %eax
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; AVX512F-NEXT: vpinsrb $8, %eax, %xmm1, %xmm1
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; AVX512F-NEXT: vpextrb $9, %xmm0, %eax
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; AVX512F-NEXT: vpinsrb $9, %eax, %xmm1, %xmm1
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; AVX512F-NEXT: vpblendw {{.*#+}} xmm0 = xmm1[0,1,2,3,4],xmm0[5,6,7]
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; AVX512F-NEXT: retq
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;
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; AVX512BW-LABEL: non_splat_minus_one_divisor_0:
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; AVX512BW: # %bb.0:
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; AVX512BW-NEXT: vpextrb $1, %xmm0, %eax
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; AVX512BW-NEXT: negb %al
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; AVX512BW-NEXT: movzbl %al, %eax
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; AVX512BW-NEXT: vpextrb $0, %xmm0, %ecx
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; AVX512BW-NEXT: negb %cl
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; AVX512BW-NEXT: movzbl %cl, %ecx
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; AVX512BW-NEXT: vmovd %ecx, %xmm1
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; AVX512BW-NEXT: vpinsrb $1, %eax, %xmm1, %xmm1
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; AVX512BW-NEXT: vpextrb $2, %xmm0, %eax
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; AVX512BW-NEXT: vpinsrb $2, %eax, %xmm1, %xmm1
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; AVX512BW-NEXT: vpextrb $3, %xmm0, %eax
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; AVX512BW-NEXT: negb %al
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; AVX512BW-NEXT: movzbl %al, %eax
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; AVX512BW-NEXT: vpinsrb $3, %eax, %xmm1, %xmm1
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; AVX512BW-NEXT: vpextrb $4, %xmm0, %eax
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; AVX512BW-NEXT: negb %al
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; AVX512BW-NEXT: movzbl %al, %eax
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; AVX512BW-NEXT: vpinsrb $4, %eax, %xmm1, %xmm1
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; AVX512BW-NEXT: vpextrb $5, %xmm0, %eax
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; AVX512BW-NEXT: negb %al
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; AVX512BW-NEXT: movzbl %al, %eax
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; AVX512BW-NEXT: vpinsrb $5, %eax, %xmm1, %xmm1
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; AVX512BW-NEXT: vpextrb $6, %xmm0, %eax
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; AVX512BW-NEXT: vpinsrb $6, %eax, %xmm1, %xmm1
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; AVX512BW-NEXT: vpextrb $7, %xmm0, %eax
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; AVX512BW-NEXT: negb %al
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; AVX512BW-NEXT: movzbl %al, %eax
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; AVX512BW-NEXT: vpinsrb $7, %eax, %xmm1, %xmm1
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; AVX512BW-NEXT: vpextrb $8, %xmm0, %eax
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; AVX512BW-NEXT: negb %al
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; AVX512BW-NEXT: movzbl %al, %eax
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; AVX512BW-NEXT: vpinsrb $8, %eax, %xmm1, %xmm1
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; AVX512BW-NEXT: vpextrb $9, %xmm0, %eax
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; AVX512BW-NEXT: vpinsrb $9, %eax, %xmm1, %xmm1
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; AVX512BW-NEXT: vpextrb $10, %xmm0, %eax
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; AVX512BW-NEXT: vpinsrb $10, %eax, %xmm1, %xmm1
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; AVX512BW-NEXT: vpextrb $11, %xmm0, %eax
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; AVX512BW-NEXT: vpinsrb $11, %eax, %xmm1, %xmm1
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; AVX512BW-NEXT: vpextrb $12, %xmm0, %eax
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; AVX512BW-NEXT: vpinsrb $12, %eax, %xmm1, %xmm1
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; AVX512BW-NEXT: vpextrb $13, %xmm0, %eax
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; AVX512BW-NEXT: vpinsrb $13, %eax, %xmm1, %xmm1
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; AVX512BW-NEXT: vpextrb $14, %xmm0, %eax
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; AVX512BW-NEXT: vpinsrb $14, %eax, %xmm1, %xmm1
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; AVX512BW-NEXT: vpextrb $15, %xmm0, %eax
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; AVX512BW-NEXT: vpinsrb $15, %eax, %xmm1, %xmm0
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; AVX512BW-NEXT: retq
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;
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; XOP-LABEL: non_splat_minus_one_divisor_0:
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; XOP: # %bb.0:
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; XOP-NEXT: vpextrb $1, %xmm0, %eax
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; XOP-NEXT: negb %al
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; XOP-NEXT: movzbl %al, %eax
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; XOP-NEXT: vpextrb $0, %xmm0, %ecx
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; XOP-NEXT: negb %cl
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; XOP-NEXT: movzbl %cl, %ecx
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; XOP-NEXT: vmovd %ecx, %xmm1
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; XOP-NEXT: vpinsrb $1, %eax, %xmm1, %xmm1
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; XOP-NEXT: vpextrb $2, %xmm0, %eax
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; XOP-NEXT: vpinsrb $2, %eax, %xmm1, %xmm1
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; XOP-NEXT: vpextrb $3, %xmm0, %eax
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; XOP-NEXT: negb %al
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; XOP-NEXT: movzbl %al, %eax
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; XOP-NEXT: vpinsrb $3, %eax, %xmm1, %xmm1
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; XOP-NEXT: vpextrb $4, %xmm0, %eax
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; XOP-NEXT: negb %al
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; XOP-NEXT: movzbl %al, %eax
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; XOP-NEXT: vpinsrb $4, %eax, %xmm1, %xmm1
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; XOP-NEXT: vpextrb $5, %xmm0, %eax
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; XOP-NEXT: negb %al
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; XOP-NEXT: movzbl %al, %eax
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; XOP-NEXT: vpinsrb $5, %eax, %xmm1, %xmm1
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; XOP-NEXT: vpextrb $6, %xmm0, %eax
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; XOP-NEXT: vpinsrb $6, %eax, %xmm1, %xmm1
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; XOP-NEXT: vpextrb $7, %xmm0, %eax
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; XOP-NEXT: negb %al
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; XOP-NEXT: movzbl %al, %eax
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; XOP-NEXT: vpinsrb $7, %eax, %xmm1, %xmm1
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; XOP-NEXT: vpextrb $8, %xmm0, %eax
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; XOP-NEXT: negb %al
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; XOP-NEXT: movzbl %al, %eax
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; XOP-NEXT: vpinsrb $8, %eax, %xmm1, %xmm1
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; XOP-NEXT: vpperm {{.*#+}} xmm0 = xmm1[0,1,2,3,4,5,6,7,8],xmm0[9,10,11,12,13,14,15]
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; XOP-NEXT: retq
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%div = sdiv <16 x i8> %A, <i8 -1, i8 -1, i8 1, i8 -1, i8 -1, i8 -1, i8 1, i8 -1, i8 -1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1>
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ret <16 x i8> %div
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}
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define <4 x i32> @non_splat_minus_one_divisor_1(<4 x i32> %A) {
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; SSE-LABEL: non_splat_minus_one_divisor_1:
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; SSE: # %bb.0:
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; SSE-NEXT: pextrd $1, %xmm0, %eax
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; SSE-NEXT: movd %xmm0, %ecx
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; SSE-NEXT: negl %ecx
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; SSE-NEXT: movd %ecx, %xmm1
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; SSE-NEXT: pinsrd $1, %eax, %xmm1
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; SSE-NEXT: pextrd $2, %xmm0, %eax
|
||||||
|
; SSE-NEXT: movl %eax, %ecx
|
||||||
|
; SSE-NEXT: shrl $31, %ecx
|
||||||
|
; SSE-NEXT: addl %eax, %ecx
|
||||||
|
; SSE-NEXT: sarl %ecx
|
||||||
|
; SSE-NEXT: pinsrd $2, %ecx, %xmm1
|
||||||
|
; SSE-NEXT: pextrd $3, %xmm0, %eax
|
||||||
|
; SSE-NEXT: movl %eax, %ecx
|
||||||
|
; SSE-NEXT: shrl $31, %ecx
|
||||||
|
; SSE-NEXT: addl %eax, %ecx
|
||||||
|
; SSE-NEXT: sarl %ecx
|
||||||
|
; SSE-NEXT: negl %ecx
|
||||||
|
; SSE-NEXT: pinsrd $3, %ecx, %xmm1
|
||||||
|
; SSE-NEXT: movdqa %xmm1, %xmm0
|
||||||
|
; SSE-NEXT: retq
|
||||||
|
;
|
||||||
|
; AVX-LABEL: non_splat_minus_one_divisor_1:
|
||||||
|
; AVX: # %bb.0:
|
||||||
|
; AVX-NEXT: vpextrd $1, %xmm0, %eax
|
||||||
|
; AVX-NEXT: vmovd %xmm0, %ecx
|
||||||
|
; AVX-NEXT: negl %ecx
|
||||||
|
; AVX-NEXT: vmovd %ecx, %xmm1
|
||||||
|
; AVX-NEXT: vpinsrd $1, %eax, %xmm1, %xmm1
|
||||||
|
; AVX-NEXT: vpextrd $2, %xmm0, %eax
|
||||||
|
; AVX-NEXT: movl %eax, %ecx
|
||||||
|
; AVX-NEXT: shrl $31, %ecx
|
||||||
|
; AVX-NEXT: addl %eax, %ecx
|
||||||
|
; AVX-NEXT: sarl %ecx
|
||||||
|
; AVX-NEXT: vpinsrd $2, %ecx, %xmm1, %xmm1
|
||||||
|
; AVX-NEXT: vpextrd $3, %xmm0, %eax
|
||||||
|
; AVX-NEXT: movl %eax, %ecx
|
||||||
|
; AVX-NEXT: shrl $31, %ecx
|
||||||
|
; AVX-NEXT: addl %eax, %ecx
|
||||||
|
; AVX-NEXT: sarl %ecx
|
||||||
|
; AVX-NEXT: negl %ecx
|
||||||
|
; AVX-NEXT: vpinsrd $3, %ecx, %xmm1, %xmm0
|
||||||
|
; AVX-NEXT: retq
|
||||||
|
%div = sdiv <4 x i32> %A, <i32 -1, i32 1, i32 2, i32 -2>
|
||||||
|
ret <4 x i32> %div
|
||||||
|
}
|
||||||
|
|
Loading…
Reference in New Issue