forked from OSchip/llvm-project
Revert "[X86] Allow more call sequences to use push instructions for argument passing"
It miscompiles some code and a reduced test case has been sent to the author. This reverts commit r240257. llvm-svn: 242373
This commit is contained in:
Reid Kleckner
parent
ef9828fb47
commit
938bd6fc96
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@ -78,7 +78,7 @@ private:
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typedef DenseMap<MachineInstr *, CallContext> ContextMap;
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bool isLegal(MachineFunction &MF);
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bool isProfitable(MachineFunction &MF, ContextMap &CallSeqMap);
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void collectCallInfo(MachineFunction &MF, MachineBasicBlock &MBB,
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@ -90,13 +90,6 @@ private:
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MachineInstr *canFoldIntoRegPush(MachineBasicBlock::iterator FrameSetup,
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unsigned Reg);
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enum InstClassification { Convert, Skip, Exit };
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InstClassification classifyInstruction(MachineBasicBlock &MBB,
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MachineBasicBlock::iterator MI,
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const X86RegisterInfo &RegInfo,
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DenseSet<unsigned int> &UsedRegs);
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const char *getPassName() const override { return "X86 Optimize Call Frame"; }
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const TargetInstrInfo *TII;
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@ -112,7 +105,7 @@ FunctionPass *llvm::createX86CallFrameOptimization() {
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return new X86CallFrameOptimization();
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}
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// This checks whether the transformation is legal.
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// This checks whether the transformation is legal.
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// Also returns false in cases where it's potentially legal, but
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// we don't even want to try.
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bool X86CallFrameOptimization::isLegal(MachineFunction &MF) {
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@ -177,8 +170,9 @@ bool X86CallFrameOptimization::isProfitable(MachineFunction &MF,
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if (!OptForSize)
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return false;
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unsigned StackAlign = TFL->getStackAlignment();
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unsigned StackAlign = TFL->getStackAlignment();
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int64_t Advantage = 0;
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for (auto CC : CallSeqMap) {
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// Call sites where no parameters are passed on the stack
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@ -211,6 +205,7 @@ bool X86CallFrameOptimization::isProfitable(MachineFunction &MF,
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return (Advantage >= 0);
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}
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bool X86CallFrameOptimization::runOnMachineFunction(MachineFunction &MF) {
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TII = MF.getSubtarget().getInstrInfo();
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TFL = MF.getSubtarget().getFrameLowering();
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@ -242,64 +237,6 @@ bool X86CallFrameOptimization::runOnMachineFunction(MachineFunction &MF) {
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return Changed;
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}
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X86CallFrameOptimization::InstClassification
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X86CallFrameOptimization::classifyInstruction(
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MachineBasicBlock &MBB, MachineBasicBlock::iterator MI,
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const X86RegisterInfo &RegInfo, DenseSet<unsigned int> &UsedRegs) {
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if (MI == MBB.end())
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return Exit;
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// The instructions we actually care about are movs onto the stack
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int Opcode = MI->getOpcode();
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if (Opcode == X86::MOV32mi || Opcode == X86::MOV32mr)
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return Convert;
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// Not all calling conventions have only stack MOVs between the stack
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// adjust and the call.
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// We want to tolerate other instructions, to cover more cases.
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// In particular:
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// a) PCrel calls, where we expect an additional COPY of the basereg.
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// b) Passing frame-index addresses.
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// c) Calling conventions that have inreg parameters. These generate
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// both copies and movs into registers.
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// To avoid creating lots of special cases, allow any instruction
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// that does not write into memory, does not def or use the stack
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// pointer, and does not def any register that was used by a preceding
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// push.
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// (Reading from memory is allowed, even if referenced through a
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// frame index, since these will get adjusted properly in PEI)
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// The reason for the last condition is that the pushes can't replace
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// the movs in place, because the order must be reversed.
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// So if we have a MOV32mr that uses EDX, then an instruction that defs
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// EDX, and then the call, after the transformation the push will use
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// the modified version of EDX, and not the original one.
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// Since we are still in SSA form at this point, we only need to
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// make sure we don't clobber any *physical* registers that were
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// used by an earlier mov that will become a push.
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if (MI->isCall() || MI->mayStore())
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return Exit;
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for (const MachineOperand &MO : MI->operands()) {
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if (!MO.isReg())
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continue;
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unsigned int Reg = MO.getReg();
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if (!RegInfo.isPhysicalRegister(Reg))
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continue;
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if (RegInfo.regsOverlap(Reg, RegInfo.getStackRegister()))
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return Exit;
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if (MO.isDef()) {
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for (unsigned int U : UsedRegs)
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if (RegInfo.regsOverlap(Reg, U))
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return Exit;
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}
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}
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return Skip;
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}
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void X86CallFrameOptimization::collectCallInfo(MachineFunction &MF,
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MachineBasicBlock &MBB,
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MachineBasicBlock::iterator I,
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@ -317,8 +254,8 @@ void X86CallFrameOptimization::collectCallInfo(MachineFunction &MF,
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// How much do we adjust the stack? This puts an upper bound on
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// the number of parameters actually passed on it.
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unsigned int MaxAdjust = FrameSetup->getOperand(0).getImm() / 4;
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unsigned int MaxAdjust = FrameSetup->getOperand(0).getImm() / 4;
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// A zero adjustment means no stack parameters
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if (!MaxAdjust) {
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Context.NoStackParams = true;
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@ -347,17 +284,11 @@ void X86CallFrameOptimization::collectCallInfo(MachineFunction &MF,
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if (MaxAdjust > 4)
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Context.MovVector.resize(MaxAdjust, nullptr);
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InstClassification Classification;
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DenseSet<unsigned int> UsedRegs;
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do {
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int Opcode = I->getOpcode();
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if (Opcode != X86::MOV32mi && Opcode != X86::MOV32mr)
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break;
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while ((Classification = classifyInstruction(MBB, I, RegInfo, UsedRegs)) !=
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Exit) {
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if (Classification == Skip) {
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++I;
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continue;
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}
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// We know the instruction is a MOV32mi/MOV32mr.
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// We only want movs of the form:
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// movl imm/r32, k(%esp)
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// If we run into something else, bail.
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@ -392,20 +323,24 @@ void X86CallFrameOptimization::collectCallInfo(MachineFunction &MF,
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return;
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Context.MovVector[StackDisp] = I;
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for (const MachineOperand &MO : I->uses()) {
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if (!MO.isReg())
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continue;
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unsigned int Reg = MO.getReg();
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if (RegInfo.isPhysicalRegister(Reg))
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UsedRegs.insert(Reg);
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}
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++I;
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} while (I != MBB.end());
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// We now expect the end of the sequence - a call and a stack adjust.
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if (I == MBB.end())
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return;
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// For PCrel calls, we expect an additional COPY of the basereg.
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// If we find one, skip it.
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if (I->isCopy()) {
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if (I->getOperand(1).getReg() ==
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MF.getInfo<X86MachineFunctionInfo>()->getGlobalBaseReg())
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++I;
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else
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return;
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}
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// We now expect the end of the sequence. If we stopped early,
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// or reached the end of the block without finding a call, bail.
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if (I == MBB.end() || !I->isCall())
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if (!I->isCall())
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return;
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Context.Call = I;
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@ -2,15 +2,11 @@
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; RUN: llc < %s -mtriple=x86_64-windows | FileCheck %s -check-prefix=X64
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; RUN: llc < %s -mtriple=i686-windows -force-align-stack -stack-alignment=32 | FileCheck %s -check-prefix=ALIGNED
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%class.Class = type { i32 }
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%struct.s = type { i64 }
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declare void @good(i32 %a, i32 %b, i32 %c, i32 %d)
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declare void @inreg(i32 %a, i32 inreg %b, i32 %c, i32 %d)
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declare x86_thiscallcc void @thiscall(%class.Class* %class, i32 %a, i32 %b, i32 %c, i32 %d)
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declare void @oneparam(i32 %a)
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declare void @eightparams(i32 %a, i32 %b, i32 %c, i32 %d, i32 %e, i32 %f, i32 %g, i32 %h)
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declare void @struct(%struct.s* byval %a, i32 %b, i32 %c, i32 %d)
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; Here, we should have a reserved frame, so we don't expect pushes
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; NORMAL-LABEL: test1:
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@ -112,12 +108,13 @@ entry:
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ret void
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}
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; We support weird calling conventions
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; We don't support weird calling conventions
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; NORMAL-LABEL: test4:
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; NORMAL: movl $2, %eax
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; NORMAL-NEXT: pushl $4
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; NORMAL-NEXT: pushl $3
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; NORMAL-NEXT: pushl $1
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; NORMAL: subl $12, %esp
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; NORMAL-NEXT: movl $4, 8(%esp)
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; NORMAL-NEXT: movl $3, 4(%esp)
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; NORMAL-NEXT: movl $1, (%esp)
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; NORMAL-NEXT: movl $2, %eax
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; NORMAL-NEXT: call
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; NORMAL-NEXT: addl $12, %esp
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define void @test4() optsize {
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@ -126,20 +123,6 @@ entry:
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ret void
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}
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; NORMAL-LABEL: test4b:
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; NORMAL: movl 4(%esp), %ecx
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; NORMAL-NEXT: pushl $4
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; NORMAL-NEXT: pushl $3
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; NORMAL-NEXT: pushl $2
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; NORMAL-NEXT: pushl $1
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; NORMAL-NEXT: call
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; NORMAL-NEXT: ret
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define void @test4b(%class.Class* %f) optsize {
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entry:
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call x86_thiscallcc void @thiscall(%class.Class* %f, i32 1, i32 2, i32 3, i32 4)
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ret void
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}
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; When there is no reserved call frame, check that additional alignment
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; is added when the pushes don't add up to the required alignment.
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; ALIGNED-LABEL: test5:
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@ -246,27 +229,20 @@ entry:
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; NORMAL-NEXT: pushl $1
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; NORMAL-NEXT: call
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; NORMAL-NEXT: addl $16, %esp
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; NORMAL-NEXT: subl $20, %esp
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; NORMAL-NEXT: movl 20(%esp), [[E1:%e..]]
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; NORMAL-NEXT: movl 24(%esp), [[E2:%e..]]
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; NORMAL-NEXT: movl [[E2]], 4(%esp)
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; NORMAL-NEXT: movl [[E1]], (%esp)
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; NORMAL-NEXT: leal 32(%esp), [[E3:%e..]]
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; NORMAL-NEXT: movl [[E3]], 16(%esp)
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; NORMAL-NEXT: leal 28(%esp), [[E4:%e..]]
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; NORMAL-NEXT: movl [[E4]], 12(%esp)
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; NORMAL-NEXT: movl $6, 8(%esp)
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; NORMAL-NEXT: subl $16, %esp
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; NORMAL-NEXT: leal 16(%esp), [[EAX:%e..]]
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; NORMAL-NEXT: movl [[EAX]], 12(%esp)
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; NORMAL-NEXT: movl $7, 8(%esp)
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; NORMAL-NEXT: movl $6, 4(%esp)
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; NORMAL-NEXT: movl $5, (%esp)
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; NORMAL-NEXT: call
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; NORMAL-NEXT: addl $20, %esp
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; NORMAL-NEXT: addl $16, %esp
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define void @test9() optsize {
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entry:
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%p = alloca i32, align 4
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%q = alloca i32, align 4
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%s = alloca %struct.s, align 4
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call void @good(i32 1, i32 2, i32 3, i32 4)
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%pv = ptrtoint i32* %p to i32
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%qv = ptrtoint i32* %q to i32
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call void @struct(%struct.s* byval %s, i32 6, i32 %qv, i32 %pv)
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%0 = ptrtoint i32* %p to i32
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call void @good(i32 5, i32 6, i32 7, i32 %0)
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ret void
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}
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@ -315,17 +291,28 @@ define void @test11() optsize {
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; Converting one mov into a push isn't worth it when
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; doing so forces too much overhead for other calls.
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; NORMAL-LABEL: test12:
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; NORMAL: movl $8, 12(%esp)
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; NORMAL: subl $16, %esp
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; NORMAL-NEXT: movl $4, 8(%esp)
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; NORMAL-NEXT: movl $3, 4(%esp)
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; NORMAL-NEXT: movl $1, (%esp)
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; NORMAL-NEXT: movl $2, %eax
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; NORMAL-NEXT: calll _inreg
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; NORMAL-NEXT: movl $8, 12(%esp)
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; NORMAL-NEXT: movl $7, 8(%esp)
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; NORMAL-NEXT: movl $6, 4(%esp)
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; NORMAL-NEXT: movl $5, (%esp)
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; NORMAL-NEXT: calll _good
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; NORMAL-NEXT: movl $12, 8(%esp)
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; NORMAL-NEXT: movl $11, 4(%esp)
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; NORMAL-NEXT: movl $9, (%esp)
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; NORMAL-NEXT: movl $10, %eax
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; NORMAL-NEXT: calll _inreg
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; NORMAL-NEXT: addl $16, %esp
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define void @test12() optsize {
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entry:
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%s = alloca %struct.s, align 4
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call void @struct(%struct.s* %s, i32 2, i32 3, i32 4)
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call void @inreg(i32 1, i32 2, i32 3, i32 4)
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call void @good(i32 5, i32 6, i32 7, i32 8)
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call void @struct(%struct.s* %s, i32 10, i32 11, i32 12)
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call void @inreg(i32 9, i32 10, i32 11, i32 12)
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ret void
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}
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@ -337,12 +324,13 @@ entry:
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; NORMAL-NEXT: pushl $1
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; NORMAL-NEXT: calll _good
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; NORMAL-NEXT: addl $16, %esp
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; NORMAL-NEXT: subl $20, %esp
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; NORMAL: movl $8, 16(%esp)
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; NORMAL-NEXT: movl $7, 12(%esp)
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; NORMAL-NEXT: movl $6, 8(%esp)
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; NORMAL-NEXT: calll _struct
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; NORMAL-NEXT: addl $20, %esp
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; NORMAL-NEXT: subl $12, %esp
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; NORMAL-NEXT: movl $8, 8(%esp)
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; NORMAL-NEXT: movl $7, 4(%esp)
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; NORMAL-NEXT: movl $5, (%esp)
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; NORMAL-NEXT: movl $6, %eax
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; NORMAL-NEXT: calll _inreg
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; NORMAL-NEXT: addl $12, %esp
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; NORMAL-NEXT: pushl $12
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; NORMAL-NEXT: pushl $11
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; NORMAL-NEXT: pushl $10
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@ -351,9 +339,8 @@ entry:
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; NORMAL-NEXT: addl $16, %esp
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define void @test12b() optsize {
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entry:
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%s = alloca %struct.s, align 4
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call void @good(i32 1, i32 2, i32 3, i32 4)
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call void @struct(%struct.s* %s, i32 6, i32 7, i32 8)
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call void @good(i32 1, i32 2, i32 3, i32 4)
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call void @inreg(i32 5, i32 6, i32 7, i32 8)
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call void @good(i32 9, i32 10, i32 11, i32 12)
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ret void
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}
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