forked from OSchip/llvm-project
Revert "MSG"
This reverts commit 9a0ce889d1c39c74d69ecad5ce9c875155ae55de. This was committed by mistake. llvm-svn: 329119
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07cf78cdad
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llvm
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@ -6446,7 +6446,7 @@ SDValue SITargetLowering::performMinMaxCombine(SDNode *N,
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if (Opc != AMDGPUISD::FMIN_LEGACY && Opc != AMDGPUISD::FMAX_LEGACY &&
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!VT.isVector() && VT != MVT::f64 &&
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VT != MVT::f64 &&
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((VT != MVT::f16 && VT != MVT::i16) || Subtarget->hasMin3Max3_16())) {
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// max(max(a, b), c) -> max3(a, b, c)
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// min(min(a, b), c) -> min3(a, b, c)
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@ -84,21 +84,9 @@ define amdgpu_kernel void @test_fmax3_olt_1_f16(half addrspace(1)* %out, half ad
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ret void
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}
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; Checks whether the test passes; performMinMaxCombine() should not optimize vector patterns of max3
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; since there are no pack instructions for fmax3.
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; GCN-LABEL: {{^}}no_fmax3_v2f16:
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define <2 x half> @no_fmax3_v2f16(<2 x half> %a, <2 x half> %b, <2 x half> %c, <2 x half> %d) {
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entry:
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%max = tail call fast <2 x half> @llvm.maxnum.v2f16(<2 x half> %a, <2 x half> %b)
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%max1 = tail call fast <2 x half> @llvm.maxnum.v2f16(<2 x half> %c, <2 x half> %max)
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%res = tail call fast <2 x half> @llvm.maxnum.v2f16(<2 x half> %max1, <2 x half> %d)
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ret <2 x half> %res
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}
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declare i32 @llvm.amdgcn.workitem.id.x() #1
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declare float @llvm.maxnum.f32(float, float) #1
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declare half @llvm.maxnum.f16(half, half) #1
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declare <2 x half> @llvm.maxnum.v2f16(<2 x half>, <2 x half>)
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attributes #0 = { nounwind }
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attributes #1 = { nounwind readnone speculatable }
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@ -82,21 +82,9 @@ define amdgpu_kernel void @test_fmin3_olt_1_f16(half addrspace(1)* %out, half ad
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ret void
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}
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; Checks whether the test passes; performMinMaxCombine() should not optimize vector patterns of min3
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; since there are no pack instructions for fmin3.
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; GCN-LABEL: {{^}}no_fmin3_v2f16:
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define <2 x half> @no_fmin3_v2f16(<2 x half> %a, <2 x half> %b, <2 x half> %c, <2 x half> %d) {
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entry:
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%min = tail call fast <2 x half> @llvm.minnum.v2f16(<2 x half> %a, <2 x half> %b)
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%min1 = tail call fast <2 x half> @llvm.minnum.v2f16(<2 x half> %c, <2 x half> %min)
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%res = tail call fast <2 x half> @llvm.minnum.v2f16(<2 x half> %min1, <2 x half> %d)
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ret <2 x half> %res
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}
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declare i32 @llvm.amdgcn.workitem.id.x() #1
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declare float @llvm.minnum.f32(float, float) #1
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declare half @llvm.minnum.f16(half, half) #1
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declare <2 x half> @llvm.minnum.v2f16(<2 x half>, <2 x half>)
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attributes #0 = { nounwind }
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attributes #1 = { nounwind readnone speculatable }
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