forked from OSchip/llvm-project
[WebAssembly] Add experimental SIMD dot product instruction
Summary: This instruction is not merged to the spec proposal, but we need it to be implemented in the toolchain to experiment with it. It is available only on an opt-in basis through a clang builtin. Defined in https://github.com/WebAssembly/simd/pull/127. Depends on D69696. Reviewers: aheejin Subscribers: dschuff, sbc100, jgravelle-google, hiraditya, sunfish, cfe-commits, llvm-commits Tags: #clang, #llvm Differential Revision: https://reviews.llvm.org/D69697
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@ -132,6 +132,8 @@ TARGET_BUILTIN(__builtin_wasm_max_f32x4, "V4fV4fV4f", "nc", "simd128")
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TARGET_BUILTIN(__builtin_wasm_min_f64x2, "V2dV2dV2d", "nc", "unimplemented-simd128")
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TARGET_BUILTIN(__builtin_wasm_max_f64x2, "V2dV2dV2d", "nc", "unimplemented-simd128")
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TARGET_BUILTIN(__builtin_wasm_dot_s_i32x4_i16x8, "V4iV8sV8s", "nc", "simd128")
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TARGET_BUILTIN(__builtin_wasm_sqrt_f32x4, "V4fV4f", "nc", "unimplemented-simd128")
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TARGET_BUILTIN(__builtin_wasm_sqrt_f64x2, "V2dV2d", "nc", "unimplemented-simd128")
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@ -14360,6 +14360,12 @@ Value *CodeGenFunction::EmitWebAssemblyBuiltinExpr(unsigned BuiltinID,
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Function *Callee = CGM.getIntrinsic(IntNo, ConvertType(E->getType()));
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return Builder.CreateCall(Callee, {LHS, RHS});
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}
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case WebAssembly::BI__builtin_wasm_dot_s_i32x4_i16x8: {
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Value *LHS = EmitScalarExpr(E->getArg(0));
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Value *RHS = EmitScalarExpr(E->getArg(1));
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Function *Callee = CGM.getIntrinsic(Intrinsic::wasm_dot);
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return Builder.CreateCall(Callee, {LHS, RHS});
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}
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case WebAssembly::BI__builtin_wasm_any_true_i8x16:
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case WebAssembly::BI__builtin_wasm_any_true_i16x8:
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case WebAssembly::BI__builtin_wasm_any_true_i32x4:
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@ -436,6 +436,12 @@ i32x4 max_u_i32x4(i32x4 x, i32x4 y) {
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// WEBASSEMBLY-NEXT: ret
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}
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i32x4 dot_i16x8_s(i16x8 x, i16x8 y) {
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return __builtin_wasm_dot_s_i32x4_i16x8(x, y);
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// WEBASSEMBLY: call <4 x i32> @llvm.wasm.dot(<8 x i16> %x, <8 x i16> %y)
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// WEBASSEMBLY-NEXT: ret
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}
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i32x4 bitselect(i32x4 x, i32x4 y, i32x4 c) {
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return __builtin_wasm_bitselect(x, y, c);
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// WEBASSEMBLY: call <4 x i32> @llvm.wasm.bitselect.v4i32(
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@ -152,6 +152,10 @@ def int_wasm_qfms :
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Intrinsic<[llvm_anyvector_ty],
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[LLVMMatchType<0>, LLVMMatchType<0>, LLVMMatchType<0>],
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[IntrNoMem, IntrSpeculatable]>;
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def int_wasm_dot :
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Intrinsic<[llvm_v4i32_ty],
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[llvm_v8i16_ty, llvm_v8i16_ty],
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[IntrNoMem, IntrSpeculatable]>;
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def int_wasm_narrow_signed :
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Intrinsic<[llvm_anyvector_ty],
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[llvm_anyvector_ty, LLVMMatchType<1>],
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@ -738,6 +738,13 @@ defm MAX_S : SIMDBinaryIntNoI64x2<int_wasm_max_signed, "max_s", 96>;
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defm MAX_U : SIMDBinaryIntNoI64x2<int_wasm_max_unsigned, "max_u", 97>;
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} // isCommutable = 1
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// Widening dot product: i32x4.dot_i16x8_s
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let isCommutable = 1 in
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defm DOT : SIMD_I<(outs V128:$dst), (ins V128:$lhs, V128:$rhs), (outs), (ins),
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[(set V128:$dst, (int_wasm_dot V128:$lhs, V128:$rhs))],
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"i32x4.dot_i16x8_s\t$dst, $lhs, $rhs", "i32x4.dot_i16x8_s",
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217>;
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//===----------------------------------------------------------------------===//
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// Floating-point unary arithmetic
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//===----------------------------------------------------------------------===//
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@ -387,6 +387,16 @@ define <4 x i32> @max_u_v4i32(<4 x i32> %x, <4 x i32> %y) {
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ret <4 x i32> %a
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}
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; CHECK-LABEL: dot:
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; SIMD128-NEXT: .functype dot (v128, v128) -> (v128){{$}}
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; SIMD128-NEXT: i32x4.dot_i16x8_s $push[[R:[0-9]+]]=, $0, $1{{$}}
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; SIMD128-NEXT: return $pop[[R]]{{$}}
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declare <4 x i32> @llvm.wasm.dot(<8 x i16>, <8 x i16>)
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define <4 x i32> @dot(<8 x i16> %x, <8 x i16> %y) {
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%a = call <4 x i32> @llvm.wasm.dot(<8 x i16> %x, <8 x i16> %y)
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ret <4 x i32> %a
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}
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; CHECK-LABEL: any_v4i32:
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; SIMD128-NEXT: .functype any_v4i32 (v128) -> (i32){{$}}
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; SIMD128-NEXT: i32x4.any_true $push[[R:[0-9]+]]=, $0{{$}}
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@ -571,4 +571,7 @@ main:
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# CHECK: v128.andnot # encoding: [0xfd,0xd8,0x01]
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v128.andnot
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# CHECK: i32x4.dot_i16x8_s # encoding: [0xfd,0xd9,0x01]
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i32x4.dot_i16x8_s
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end_function
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