forked from OSchip/llvm-project
[X86][AVX2] Regenerate arithmetic tests
Fixed missing checks for tests that used a '-' in the name, which was messing with update_llc_test_checks.py llvm-svn: 291363
This commit is contained in:
Simon Pilgrim
parent
d5549f3dac
commit
935beac173
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@ -142,17 +142,108 @@ define <16 x i16> @test_vpmullw(<16 x i16> %i, <16 x i16> %j) nounwind readnone
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ret <16 x i16> %x
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}
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define <16 x i8> @mul-v16i8(<16 x i8> %i, <16 x i8> %j) nounwind readnone {
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define <16 x i8> @mul_v16i8(<16 x i8> %i, <16 x i8> %j) nounwind readnone {
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; X32-LABEL: mul_v16i8:
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; X32: ## BB#0:
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; X32-NEXT: vpmovsxbw %xmm1, %ymm1
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; X32-NEXT: vpmovsxbw %xmm0, %ymm0
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; X32-NEXT: vpmullw %ymm1, %ymm0, %ymm0
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; X32-NEXT: vextracti128 $1, %ymm0, %xmm1
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; X32-NEXT: vmovdqa {{.*#+}} xmm2 = <0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u>
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; X32-NEXT: vpshufb %xmm2, %xmm1, %xmm1
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; X32-NEXT: vpshufb %xmm2, %xmm0, %xmm0
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; X32-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
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; X32-NEXT: vzeroupper
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; X32-NEXT: retl
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;
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; X64-LABEL: mul_v16i8:
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; X64: ## BB#0:
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; X64-NEXT: vpmovsxbw %xmm1, %ymm1
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; X64-NEXT: vpmovsxbw %xmm0, %ymm0
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; X64-NEXT: vpmullw %ymm1, %ymm0, %ymm0
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; X64-NEXT: vextracti128 $1, %ymm0, %xmm1
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; X64-NEXT: vmovdqa {{.*#+}} xmm2 = <0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u>
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; X64-NEXT: vpshufb %xmm2, %xmm1, %xmm1
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; X64-NEXT: vpshufb %xmm2, %xmm0, %xmm0
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; X64-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
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; X64-NEXT: vzeroupper
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; X64-NEXT: retq
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%x = mul <16 x i8> %i, %j
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ret <16 x i8> %x
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}
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define <32 x i8> @mul-v32i8(<32 x i8> %i, <32 x i8> %j) nounwind readnone {
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define <32 x i8> @mul_v32i8(<32 x i8> %i, <32 x i8> %j) nounwind readnone {
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; X32-LABEL: mul_v32i8:
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; X32: ## BB#0:
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; X32-NEXT: vextracti128 $1, %ymm1, %xmm2
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; X32-NEXT: vpmovsxbw %xmm2, %ymm2
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; X32-NEXT: vextracti128 $1, %ymm0, %xmm3
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; X32-NEXT: vpmovsxbw %xmm3, %ymm3
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; X32-NEXT: vpmullw %ymm2, %ymm3, %ymm2
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; X32-NEXT: vextracti128 $1, %ymm2, %xmm3
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; X32-NEXT: vmovdqa {{.*#+}} xmm4 = <0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u>
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; X32-NEXT: vpshufb %xmm4, %xmm3, %xmm3
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; X32-NEXT: vpshufb %xmm4, %xmm2, %xmm2
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; X32-NEXT: vpunpcklqdq {{.*#+}} xmm2 = xmm2[0],xmm3[0]
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; X32-NEXT: vpmovsxbw %xmm1, %ymm1
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; X32-NEXT: vpmovsxbw %xmm0, %ymm0
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; X32-NEXT: vpmullw %ymm1, %ymm0, %ymm0
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; X32-NEXT: vextracti128 $1, %ymm0, %xmm1
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; X32-NEXT: vpshufb %xmm4, %xmm1, %xmm1
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; X32-NEXT: vpshufb %xmm4, %xmm0, %xmm0
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; X32-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
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; X32-NEXT: vinserti128 $1, %xmm2, %ymm0, %ymm0
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; X32-NEXT: retl
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;
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; X64-LABEL: mul_v32i8:
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; X64: ## BB#0:
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; X64-NEXT: vextracti128 $1, %ymm1, %xmm2
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; X64-NEXT: vpmovsxbw %xmm2, %ymm2
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; X64-NEXT: vextracti128 $1, %ymm0, %xmm3
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; X64-NEXT: vpmovsxbw %xmm3, %ymm3
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; X64-NEXT: vpmullw %ymm2, %ymm3, %ymm2
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; X64-NEXT: vextracti128 $1, %ymm2, %xmm3
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; X64-NEXT: vmovdqa {{.*#+}} xmm4 = <0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u>
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; X64-NEXT: vpshufb %xmm4, %xmm3, %xmm3
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; X64-NEXT: vpshufb %xmm4, %xmm2, %xmm2
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; X64-NEXT: vpunpcklqdq {{.*#+}} xmm2 = xmm2[0],xmm3[0]
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; X64-NEXT: vpmovsxbw %xmm1, %ymm1
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; X64-NEXT: vpmovsxbw %xmm0, %ymm0
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; X64-NEXT: vpmullw %ymm1, %ymm0, %ymm0
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; X64-NEXT: vextracti128 $1, %ymm0, %xmm1
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; X64-NEXT: vpshufb %xmm4, %xmm1, %xmm1
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; X64-NEXT: vpshufb %xmm4, %xmm0, %xmm0
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; X64-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
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; X64-NEXT: vinserti128 $1, %xmm2, %ymm0, %ymm0
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; X64-NEXT: retq
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%x = mul <32 x i8> %i, %j
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ret <32 x i8> %x
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}
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define <4 x i64> @mul-v4i64(<4 x i64> %i, <4 x i64> %j) nounwind readnone {
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define <4 x i64> @mul_v4i64(<4 x i64> %i, <4 x i64> %j) nounwind readnone {
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; X32-LABEL: mul_v4i64:
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; X32: ## BB#0:
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; X32-NEXT: vpsrlq $32, %ymm0, %ymm2
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; X32-NEXT: vpmuludq %ymm1, %ymm2, %ymm2
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; X32-NEXT: vpsrlq $32, %ymm1, %ymm3
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; X32-NEXT: vpmuludq %ymm3, %ymm0, %ymm3
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; X32-NEXT: vpaddq %ymm2, %ymm3, %ymm2
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; X32-NEXT: vpsllq $32, %ymm2, %ymm2
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; X32-NEXT: vpmuludq %ymm1, %ymm0, %ymm0
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; X32-NEXT: vpaddq %ymm2, %ymm0, %ymm0
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; X32-NEXT: retl
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;
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; X64-LABEL: mul_v4i64:
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; X64: ## BB#0:
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; X64-NEXT: vpsrlq $32, %ymm0, %ymm2
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; X64-NEXT: vpmuludq %ymm1, %ymm2, %ymm2
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; X64-NEXT: vpsrlq $32, %ymm1, %ymm3
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; X64-NEXT: vpmuludq %ymm3, %ymm0, %ymm3
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; X64-NEXT: vpaddq %ymm2, %ymm3, %ymm2
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; X64-NEXT: vpsllq $32, %ymm2, %ymm2
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; X64-NEXT: vpmuludq %ymm1, %ymm0, %ymm0
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; X64-NEXT: vpaddq %ymm2, %ymm0, %ymm0
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; X64-NEXT: retq
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%x = mul <4 x i64> %i, %j
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ret <4 x i64> %x
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}
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@ -291,8 +382,8 @@ define <8 x i32> @mul_const9(<8 x i32> %x) {
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ret <8 x i32> %y
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}
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define <4 x i32> @mul_const10(<4 x i32> %x) {
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; %x * 0x01010101
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define <4 x i32> @mul_const10(<4 x i32> %x) {
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; X32-LABEL: mul_const10:
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; X32: ## BB#0:
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; X32-NEXT: vpbroadcastd LCPI22_0, %xmm1
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@ -308,8 +399,8 @@ define <4 x i32> @mul_const10(<4 x i32> %x) {
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ret <4 x i32> %m
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}
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define <4 x i32> @mul_const11(<4 x i32> %x) {
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; %x * 0x80808080
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define <4 x i32> @mul_const11(<4 x i32> %x) {
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; X32-LABEL: mul_const11:
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; X32: ## BB#0:
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; X32-NEXT: vpbroadcastd LCPI23_0, %xmm1
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