forked from OSchip/llvm-project
[MachineLICM] Re-enable hoisting of constant stores
This patch fixes an issue exposed on the SystemZ build bots when committing https://reviews.llvm.org/rL327856. The hoisting was temporarily disabled with an option. This patch now re-enables hoisting and checks that we only hoist a store instruction when all its operands are either constant caller preserved registers or immediates. Differential Revision: https://reviews.llvm.org/D45286 llvm-svn: 329577
This commit is contained in:
Zaara Syeda
parent
f0029a7738
commit
935474fef5
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@ -74,7 +74,7 @@ SinkInstsToAvoidSpills("sink-insts-to-avoid-spills",
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static cl::opt<bool>
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HoistConstStores("hoist-const-stores",
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cl::desc("Hoist invariant stores"),
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cl::init(false), cl::Hidden);
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cl::init(true), cl::Hidden);
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STATISTIC(NumHoisted,
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"Number of machine instructions hoisted out of loops");
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@ -902,10 +902,13 @@ static bool mayLoadFromGOTOrConstantPool(MachineInstr &MI) {
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// This means, the value being stored and the address where it is being stored
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// is constant throughout the body of the function (not including prologue and
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// epilogue). When called with an MI that isn't a store, it returns false.
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// A future improvement can be to check if the store registers are constant
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// throughout the loop rather than throughout the funtion.
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static bool isInvariantStore(const MachineInstr &MI,
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const TargetRegisterInfo *TRI,
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const MachineRegisterInfo *MRI) {
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bool FoundCallerPresReg = false;
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if (!MI.mayStore() || MI.hasUnmodeledSideEffects() ||
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(MI.getNumOperands() == 0))
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return false;
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@ -922,9 +925,13 @@ static bool isInvariantStore(const MachineInstr &MI,
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return false;
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if (!TRI->isCallerPreservedPhysReg(Reg, *MI.getMF()))
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return false;
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else
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FoundCallerPresReg = true;
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} else if (!MO.isImm()) {
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return false;
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}
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}
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return true;
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return FoundCallerPresReg;
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}
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// Return true if the input MI is a copy instruction that feeds an invariant
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@ -0,0 +1,145 @@
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; RUN: llc -verify-machineinstrs -mtriple=s390x-ibm-linux -mcpu=z13 -O3 -hoist-const-stores < %s | FileCheck %s
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@b = dso_local local_unnamed_addr global i32 15, align 4
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@e = dso_local local_unnamed_addr global i32 -1, align 4
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@f = common dso_local global i32 0, align 4
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@g = dso_local local_unnamed_addr global i32* @f, align 8
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@c = common dso_local local_unnamed_addr global i32 0, align 4
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@a = common dso_local local_unnamed_addr global [6 x i32] zeroinitializer, align 4
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@d = common dso_local local_unnamed_addr global i32 0, align 4
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@h = common dso_local local_unnamed_addr global i32 0, align 4
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@.str = private unnamed_addr constant [15 x i8] c"checksum = %X\0A\00", align 2
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; Function Attrs: nounwind
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define dso_local signext i32 @main() {
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entry:
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%i = alloca i32, align 4
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%.pr = load i32, i32* @c, align 4, !tbaa !2
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%cmp6 = icmp slt i32 %.pr, 6
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br i1 %cmp6, label %for.body.preheader, label %for.end
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for.body.preheader: ; preds = %entry
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store i32 5, i32* getelementptr inbounds ([6 x i32], [6 x i32]* @a, i64 0, i64 1), align 4, !tbaa !2
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store i32 6, i32* @c, align 4, !tbaa !2
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br label %for.end
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for.end: ; preds = %for.body.preheader, %entry
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%0 = bitcast i32* %i to i8*
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call void @llvm.lifetime.start.p0i8(i64 4, i8* nonnull %0)
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store i32 14, i32* %i, align 4, !tbaa !2
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%.pr2 = load i32, i32* @d, align 4, !tbaa !2
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%cmp25 = icmp sgt i32 %.pr2, -1
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br i1 %cmp25, label %for.cond4thread-pre-split.lr.ph, label %for.end.for.end11_crit_edge
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for.end.for.end11_crit_edge: ; preds = %for.end
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%.pre10 = load i32, i32* @b, align 4, !tbaa !2
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br label %for.end11
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; CHECK: # %for.cond4thread-pre-split.lr.ph
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; CHECK-NOT: mvhi 164(%r15), 0
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; CHECK: # %for.end9
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; CHECK: mvhi 164(%r15), 0
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for.cond4thread-pre-split.lr.ph: ; preds = %for.end
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%1 = ptrtoint i32* %i to i64
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%2 = trunc i64 %1 to i32
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%3 = load i32*, i32** @g, align 8
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%.pr3.pre = load i32, i32* @e, align 4, !tbaa !2
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br label %for.cond4thread-pre-split
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for.cond4thread-pre-split: ; preds = %for.cond4thread-pre-split.lr.ph, %for.end9
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%4 = phi i32 [ %.pr2, %for.cond4thread-pre-split.lr.ph ], [ %dec, %for.end9 ]
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%5 = phi i32 [ 14, %for.cond4thread-pre-split.lr.ph ], [ 0, %for.end9 ]
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%.pr3 = phi i32 [ %.pr3.pre, %for.cond4thread-pre-split.lr.ph ], [ %.pr37, %for.end9 ]
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%cmp54 = icmp slt i32 %.pr3, 1
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br i1 %cmp54, label %for.body6.preheader, label %for.end9
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for.body6.preheader: ; preds = %for.cond4thread-pre-split
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store i32 %5, i32* %3, align 4, !tbaa !2
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%6 = load i32, i32* @e, align 4, !tbaa !2
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%inc811 = add nsw i32 %6, 1
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store i32 %inc811, i32* @e, align 4, !tbaa !2
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%cmp512 = icmp slt i32 %6, 0
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br i1 %cmp512, label %for.body6.for.body6_crit_edge, label %for.end9.loopexit
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for.body6.for.body6_crit_edge: ; preds = %for.body6.preheader, %for.body6.for.body6_crit_edge.3
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%.pre = load i32, i32* %i, align 4, !tbaa !2
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store i32 %.pre, i32* %3, align 4, !tbaa !2
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%7 = load i32, i32* @e, align 4, !tbaa !2
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%inc8 = add nsw i32 %7, 1
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store i32 %inc8, i32* @e, align 4, !tbaa !2
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%cmp5 = icmp slt i32 %7, 0
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br i1 %cmp5, label %for.body6.for.body6_crit_edge.1, label %for.end9.loopexit
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for.end9.loopexit: ; preds = %for.body6.for.body6_crit_edge, %for.body6.for.body6_crit_edge.1, %for.body6.for.body6_crit_edge.2, %for.body6.for.body6_crit_edge.3, %for.body6.preheader
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%inc8.lcssa = phi i32 [ %inc811, %for.body6.preheader ], [ %inc8, %for.body6.for.body6_crit_edge ], [ %inc8.1, %for.body6.for.body6_crit_edge.1 ], [ %inc8.2, %for.body6.for.body6_crit_edge.2 ], [ %inc8.3, %for.body6.for.body6_crit_edge.3 ]
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%.pre9 = load i32, i32* @d, align 4, !tbaa !2
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br label %for.end9
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for.end9: ; preds = %for.end9.loopexit, %for.cond4thread-pre-split
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%8 = phi i32 [ %.pre9, %for.end9.loopexit ], [ %4, %for.cond4thread-pre-split ]
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%.pr37 = phi i32 [ %inc8.lcssa, %for.end9.loopexit ], [ %.pr3, %for.cond4thread-pre-split ]
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store i32 %2, i32* @h, align 4, !tbaa !2
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store i32 0, i32* %i, align 4, !tbaa !2
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%9 = load i32, i32* @b, align 4, !tbaa !2
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%10 = load i32, i32* @f, align 4, !tbaa !2
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%xor = xor i32 %10, %9
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%idxprom = sext i32 %xor to i64
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%arrayidx = getelementptr inbounds [6 x i32], [6 x i32]* @a, i64 0, i64 %idxprom
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%11 = load i32, i32* %arrayidx, align 4, !tbaa !2
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store i32 %11, i32* @b, align 4, !tbaa !2
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%dec = add nsw i32 %8, -1
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store i32 %dec, i32* @d, align 4, !tbaa !2
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%cmp2 = icmp sgt i32 %8, 0
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br i1 %cmp2, label %for.cond4thread-pre-split, label %for.end11
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for.end11: ; preds = %for.end9, %for.end.for.end11_crit_edge
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%12 = phi i32 [ %.pre10, %for.end.for.end11_crit_edge ], [ %11, %for.end9 ]
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%call = call signext i32 (i8*, ...) @printf(i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str, i64 0, i64 0), i32 signext %12)
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call void @llvm.lifetime.end.p0i8(i64 4, i8* nonnull %0)
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ret i32 0
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for.body6.for.body6_crit_edge.1: ; preds = %for.body6.for.body6_crit_edge
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%.pre.1 = load i32, i32* %i, align 4, !tbaa !2
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store i32 %.pre.1, i32* %3, align 4, !tbaa !2
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%13 = load i32, i32* @e, align 4, !tbaa !2
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%inc8.1 = add nsw i32 %13, 1
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store i32 %inc8.1, i32* @e, align 4, !tbaa !2
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%cmp5.1 = icmp slt i32 %13, 0
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br i1 %cmp5.1, label %for.body6.for.body6_crit_edge.2, label %for.end9.loopexit
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for.body6.for.body6_crit_edge.2: ; preds = %for.body6.for.body6_crit_edge.1
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%.pre.2 = load i32, i32* %i, align 4, !tbaa !2
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store i32 %.pre.2, i32* %3, align 4, !tbaa !2
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%14 = load i32, i32* @e, align 4, !tbaa !2
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%inc8.2 = add nsw i32 %14, 1
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store i32 %inc8.2, i32* @e, align 4, !tbaa !2
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%cmp5.2 = icmp slt i32 %14, 0
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br i1 %cmp5.2, label %for.body6.for.body6_crit_edge.3, label %for.end9.loopexit
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for.body6.for.body6_crit_edge.3: ; preds = %for.body6.for.body6_crit_edge.2
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%.pre.3 = load i32, i32* %i, align 4, !tbaa !2
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store i32 %.pre.3, i32* %3, align 4, !tbaa !2
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%15 = load i32, i32* @e, align 4, !tbaa !2
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%inc8.3 = add nsw i32 %15, 1
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store i32 %inc8.3, i32* @e, align 4, !tbaa !2
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%cmp5.3 = icmp slt i32 %15, 0
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br i1 %cmp5.3, label %for.body6.for.body6_crit_edge, label %for.end9.loopexit
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}
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; Function Attrs: argmemonly nounwind
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declare void @llvm.lifetime.start.p0i8(i64, i8* nocapture)
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; Function Attrs: argmemonly nounwind
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declare void @llvm.lifetime.end.p0i8(i64, i8* nocapture)
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; Function Attrs: nounwind
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declare dso_local signext i32 @printf(i8* nocapture readonly, ...)
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!llvm.module.flags = !{!0}
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!0 = !{i32 1, !"wchar_size", i32 4}
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!2 = !{!3, !3, i64 0}
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!3 = !{!"int", !4, i64 0}
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!4 = !{!"omnipotent char", !5, i64 0}
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!5 = !{!"Simple C/C++ TBAA"}
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