forked from OSchip/llvm-project
parent
60d5131653
commit
9351e4f4b2
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@ -284,6 +284,36 @@ void ARMInstPrinter::printAddrMode5Operand(const MCInst *MI, unsigned OpNum,
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O << "]";
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}
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void ARMInstPrinter::printAddrMode6Operand(const MCInst *MI, unsigned OpNum) {
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const MCOperand &MO1 = MI->getOperand(OpNum);
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const MCOperand &MO2 = MI->getOperand(OpNum+1);
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const MCOperand &MO3 = MI->getOperand(OpNum+2);
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// FIXME: No support yet for specifying alignment.
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O << '[' << getRegisterName(MO1.getReg()) << ']';
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if (ARM_AM::getAM6WBFlag(MO3.getImm())) {
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if (MO2.getReg() == 0)
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O << '!';
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else
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O << ", " << getRegisterName(MO2.getReg());
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}
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}
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void ARMInstPrinter::printAddrModePCOperand(const MCInst *MI, unsigned OpNum,
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const char *Modifier) {
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assert(0 && "FIXME: Implement printAddrModePCOperand");
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}
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void ARMInstPrinter::printBitfieldInvMaskImmOperand (const MCInst *MI,
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unsigned OpNum) {
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const MCOperand &MO = MI->getOperand(OpNum);
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uint32_t v = ~MO.getImm();
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int32_t lsb = CountTrailingZeros_32(v);
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int32_t width = (32 - CountLeadingZeros_32 (v)) - lsb;
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assert(MO.isImm() && "Not a valid bf_inv_mask_imm value!");
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O << '#' << lsb << ", #" << width;
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}
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void ARMInstPrinter::printRegisterList(const MCInst *MI, unsigned OpNum) {
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O << "{";
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@ -47,10 +47,11 @@ public:
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const char *Modifier = 0);
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void printAddrMode5Operand(const MCInst *MI, unsigned OpNum,
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const char *Modifier = 0);
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void printAddrMode6Operand(const MCInst *MI, unsigned OpNum) {}
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void printAddrMode6Operand(const MCInst *MI, unsigned OpNum);
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void printAddrModePCOperand(const MCInst *MI, unsigned OpNum,
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const char *Modifier = 0) {}
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void printBitfieldInvMaskImmOperand (const MCInst *MI, unsigned OpNum) {}
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const char *Modifier = 0);
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void printBitfieldInvMaskImmOperand (const MCInst *MI, unsigned OpNum);
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void printThumbITMask(const MCInst *MI, unsigned OpNum) {}
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void printThumbAddrModeRROperand(const MCInst *MI, unsigned OpNum) {}
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