forked from OSchip/llvm-project
[llvm-readobj] Fix printing of Windows ARM unwind opcodes, add tests
The existing code was essentially untested; in some cases, it used too narrow variable types to fit all the bits, in some cases the bit manipulation operations were incorrect. For the "ldr lr, [sp], #x" opcode, there's nothing in the documentation that says it cannot be used in a prologue. (In practice, it would probably seldom be used there, but technically there's nothing stopping it from being used.) The documentation only specifies the operation to replay for unwinding it, but the corresponding mirror instruction to be printed for a prologue is "str lr, [sp, #-x]!". Also improve printing of register masks, by aggregating registers into ranges where possible, and make the printing of the terminating branches clearer, as "bx <reg>" and "b.w <target>". Differential Revision: https://reviews.llvm.org/D125643
This commit is contained in:
Martin Storsjö
parent
d81064949f
commit
92f1028ceb
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@ -0,0 +1,239 @@
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// REQUIRES: arm-registered-target
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// RUN: llvm-mc -filetype=obj -triple thumbv7-windows-gnu %s -o %t.o
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// RUN: llvm-readobj --unwind %t.o | FileCheck --strict-whitespace %s
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// CHECK: RuntimeFunction {
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// CHECK-NEXT: Function: func0
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// CHECK: Prologue [
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// CHECK-NEXT: 0xcb ; mov r11, sp
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// CHECK-NEXT: 0x95 0x00 ; push.w {r8, r10, r12}
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// CHECK-NEXT: 0xf6 0x13 ; vpush {d17-d19}
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// CHECK-NEXT: 0xfc ; nop.w
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// CHECK-NEXT: 0xf5 0x35 ; vpush {d3-d5}
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// CHECK-NEXT: 0xfb ; nop
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// CHECK-NEXT: 0xe2 ; vpush {d8-d10}
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// CHECK-NEXT: 0x08 ; sub sp, #(8 * 4)
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// CHECK-NEXT: 0xd6 ; push {r4-r6, lr}
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// CHECK-NEXT: ]
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// CHECK-NEXT: EpilogueScopes [
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// CHECK-NEXT: EpilogueScope {
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// CHECK-NEXT: StartOffset: 15
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// CHECK-NEXT: Condition: 14
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// CHECK-NEXT: EpilogueStartIndex: 13
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// CHECK-NEXT: Opcodes [
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// CHECK-NEXT: 0xe2 ; vpop {d8-d10}
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// CHECK-NEXT: 0xcb ; mov sp, r11
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// CHECK-NEXT: 0x08 ; add sp, #(8 * 4)
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// CHECK-NEXT: 0xd6 ; pop {r4-r6, pc}
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// CHECK-NEXT: ]
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// CHECK-NEXT: }
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// CHECK-NEXT: ]
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// CHECK: RuntimeFunction {
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// CHECK-NEXT: Function: func1
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// CHECK: Prologue [
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// CHECK-NEXT: 0xef 0x08 ; str.w lr, [sp, #-32]!
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// CHECK-NEXT: 0xd1 ; push {r4-r5}
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// CHECK-NEXT: 0xfd ; bx <reg>
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// CHECK-NEXT: ]
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// CHECK-NEXT: EpilogueScopes [
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// CHECK-NEXT: EpilogueScope {
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// CHECK-NEXT: StartOffset: 4
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// CHECK-NEXT: Condition: 14
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// CHECK-NEXT: EpilogueStartIndex: 4
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// CHECK-NEXT: Opcodes [
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// CHECK-NEXT: 0xef 0x08 ; ldr.w lr, [sp], #32
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// CHECK-NEXT: 0xd1 ; pop {r4-r5}
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// CHECK-NEXT: 0xfd ; bx <reg>
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// CHECK-NEXT: ]
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// CHECK-NEXT: }
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// CHECK-NEXT: ]
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// CHECK: RuntimeFunction {
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// CHECK-NEXT: Function: func2
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// CHECK-NEXT: ExceptionRecord:
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// CHECK-NEXT: ExceptionData {
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// CHECK-NEXT: FunctionLength:
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// CHECK-NEXT: Version:
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// CHECK-NEXT: ExceptionData: No
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// CHECK-NEXT: EpiloguePacked: Yes
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// CHECK-NEXT: Fragment: No
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// CHECK-NEXT: EpilogueOffset: 0
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// CHECK-NEXT: ByteCodeLength:
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// CHECK-NEXT: Prologue [
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// CHECK-NEXT: 0x04 ; sub sp, #(4 * 4)
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// CHECK-NEXT: 0xec 0x80 ; push {r7}
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// CHECK-NEXT: 0xc7 ; mov r7, sp
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// CHECK-NEXT: 0xfe ; b.w <target>
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// CHECK-NEXT: ]
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// CHECK-NEXT: }
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// CHECK-NEXT: }
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// CHECK-NEXT: RuntimeFunction {
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// CHECK-NEXT: Function: func3
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// CHECK-NEXT: ExceptionRecord:
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// CHECK-NEXT: ExceptionData {
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// CHECK-NEXT: FunctionLength:
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// CHECK-NEXT: Version:
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// CHECK-NEXT: ExceptionData: No
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// CHECK-NEXT: EpiloguePacked: Yes
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// CHECK-NEXT: Fragment: Yes
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// CHECK-NEXT: EpilogueOffset: 1
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// CHECK-NEXT: ByteCodeLength:
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// CHECK-NEXT: Prologue [
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// CHECK-NEXT: 0x04 ; sub sp, #(4 * 4)
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// CHECK-NEXT: 0xdf ; push.w {r4-r11, lr}
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// CHECK-NEXT: ]
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// CHECK-NEXT: Epilogue [
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// CHECK-NEXT: 0xdf ; pop.w {r4-r11, pc}
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// CHECK-NEXT: ]
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// CHECK-NEXT: }
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// CHECK-NEXT: }
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// CHECK-NEXT: RuntimeFunction {
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// CHECK-NEXT: Function: func4
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// CHECK-NEXT: ExceptionRecord:
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// CHECK-NEXT: ExceptionData {
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// CHECK-NEXT: FunctionLength:
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// CHECK-NEXT: Version:
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// CHECK-NEXT: ExceptionData: No
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// CHECK-NEXT: EpiloguePacked: Yes
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// CHECK-NEXT: Fragment: No
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// CHECK-NEXT: EpilogueOffset: 0
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// CHECK-NEXT: ByteCodeLength:
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// CHECK-NEXT: Prologue [
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// CHECK-NEXT: 0xec 0x50 ; push {r4, r6}
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// CHECK-NEXT: 0xb5 0x00 ; push.w {r8, r10, r12, lr}
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// CHECK-NEXT: ]
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// CHECK-NEXT: }
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// CHECK-NEXT: }
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// CHECK-NEXT: RuntimeFunction {
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// CHECK-NEXT: Function: func5
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// CHECK-NEXT: ExceptionRecord:
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// CHECK-NEXT: ExceptionData {
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// CHECK-NEXT: FunctionLength:
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// CHECK-NEXT: Version:
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// CHECK-NEXT: ExceptionData: No
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// CHECK-NEXT: EpiloguePacked: Yes
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// CHECK-NEXT: Fragment: No
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// CHECK-NEXT: EpilogueOffset: 16
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// CHECK-NEXT: ByteCodeLength:
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// CHECK-NEXT: Prologue [
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// CHECK-NEXT: 0xfa 0x00 0x00 0x20 ; sub.w sp, sp, #(32 * 4)
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// CHECK-NEXT: 0xf9 0x00 0x10 ; sub.w sp, sp, #(16 * 4)
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// CHECK-NEXT: 0xf8 0x00 0x00 0x08 ; sub sp, sp, #(8 * 4)
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// CHECK-NEXT: 0xf7 0x00 0x04 ; sub sp, sp, #(4 * 4)
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// CHECK-NEXT: 0xe8 0x02 ; sub.w sp, #(2 * 4)
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// CHECK-NEXT: 0xed 0x50 ; push {r4, r6, lr}
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// CHECK-NEXT: ]
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// CHECK-NEXT: Epilogue [
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// CHECK-NEXT: 0xed 0x50 ; pop {r4, r6, pc}
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// CHECK-NEXT: ]
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// CHECK-NEXT: }
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// CHECK-NEXT: }
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.thumb
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.syntax unified
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func0:
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push {r4-r6, lr}
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sub sp, sp, #32
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vpush {d8-d10}
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nop
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vpush {d3-d5}
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nop.w
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vpush {d17-d19}
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push {r8, r10, r12}
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mov r11, sp
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nop
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vpop {d8-d10}
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mov sp, r11
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add sp, sp, #32
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pop {r4-r6, pc}
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func1:
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push {r4-r5}
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str lr, [sp, #-32]!
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nop
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ldr lr, [sp], #32
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pop {r4-r5}
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bx lr
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func2:
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mov r7, sp
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push {r7}
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sub sp, sp, #16
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nop
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add sp, sp, #16
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pop {r7}
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mov sp, r7
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b tailcall
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func3:
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nop.w
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nop
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nop
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add sp, sp, #16
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pop {r4-r11, pc}
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func4:
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push {r8, r10, r12, lr}
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push {r4, r6}
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nop
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pop {r4, r6}
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pop {r8, r10, r12, pc}
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func5:
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push {r4, r6, lr}
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subw sp, sp, #8
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sub sp, sp, #16
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sub sp, sp, #32
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subw sp, sp, #64
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subw sp, sp, #128
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nop
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pop {r4, r6, pc}
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.section .pdata,"dr"
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.rva func0
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.rva .Lunwind_func0
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.rva func1
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.rva .Lunwind_func1
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.rva func2
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.rva .Lunwind_func2
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.rva func3
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.rva .Lunwind_func3
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.rva func4
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.rva .Lunwind_func4
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.rva func5
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.rva .Lunwind_func5
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.section .xdata,"dr"
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.Lunwind_func0:
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.byte 0x14, 0x00, 0x80, 0x50
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.byte 0x0f, 0x00, 0xe0, 0x0d
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.byte 0xcb, 0x95, 0x00, 0xf6
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.byte 0x13, 0xfc, 0xf5, 0x35
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.byte 0xfb, 0xe2, 0x08, 0xd6
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.byte 0xff, 0xe2, 0xcb, 0x08
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.byte 0xd6, 0xff, 0x00, 0x00
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.Lunwind_func1:
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.byte 0x08, 0x00, 0x00, 0x00
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.byte 0x01, 0x00, 0x02, 0x00
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.byte 0x04, 0x00, 0xe0, 0x04
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.byte 0xef, 0x08, 0xd1, 0xfd
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.byte 0xef, 0x08, 0xd1, 0xfd
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.Lunwind_func2:
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.byte 0x09, 0x00, 0x20, 0x20
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.byte 0x04, 0xec, 0x80, 0xc7
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.byte 0xfe, 0x00, 0x00, 0x00
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.Lunwind_func3:
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.byte 0x07, 0x00, 0xe0, 0x10
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.byte 0x04, 0xdf, 0xff, 0x00
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.Lunwind_func4:
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.byte 0x07, 0x00, 0x20, 0x20
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.byte 0xec, 0x50, 0xb5, 0x00
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.byte 0xff, 0x00, 0x00, 0x00
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.Lunwind_func5:
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.byte 0x0b, 0x00, 0x20, 0x58
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.byte 0xfa, 0x00, 0x00, 0x20
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.byte 0xf9, 0x00, 0x10, 0xf8
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.byte 0x00, 0x00, 0x08, 0xf7
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.byte 0x00, 0x04, 0xe8, 0x02
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.byte 0xed, 0x50, 0xff, 0x00
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@ -78,10 +78,10 @@ raw_ostream &operator<<(raw_ostream &OS, const ARM::WinEH::ReturnType &RT) {
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OS << "pop {pc}";
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break;
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case ARM::WinEH::ReturnType::RT_B:
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OS << "b target";
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OS << "bx <reg>";
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break;
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case ARM::WinEH::ReturnType::RT_BW:
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OS << "b.w target";
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OS << "b.w <target>";
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break;
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case ARM::WinEH::ReturnType::RT_NoEpilogue:
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OS << "(no epilogue)";
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@ -174,26 +174,45 @@ const Decoder::RingEntry Decoder::Ring64[] = {
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{ 0xff, 0xec, 1, &Decoder::opcode_clear_unwound_to_call },
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};
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void Decoder::printRegisters(const std::pair<uint16_t, uint32_t> &RegisterMask) {
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static const char * const GPRRegisterNames[16] = {
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"r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10",
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"r11", "ip", "sp", "lr", "pc",
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};
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static void printRange(raw_ostream &OS, ListSeparator &LS, unsigned First,
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unsigned Last, char Letter) {
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if (First == Last)
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OS << LS << Letter << First;
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else
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OS << LS << Letter << First << "-" << Letter << Last;
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}
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static void printRange(raw_ostream &OS, uint32_t Mask, ListSeparator &LS,
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unsigned Start, unsigned End, char Letter) {
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int First = -1;
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for (unsigned RI = Start; RI <= End; ++RI) {
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if (Mask & (1 << RI)) {
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if (First < 0)
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First = RI;
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} else {
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if (First >= 0) {
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printRange(OS, LS, First, RI - 1, Letter);
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First = -1;
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}
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}
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}
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if (First >= 0)
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printRange(OS, LS, First, End, Letter);
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}
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void Decoder::printRegisters(
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const std::pair<uint16_t, uint32_t> &RegisterMask) {
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const uint16_t GPRMask = std::get<0>(RegisterMask);
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const uint16_t VFPMask = std::get<1>(RegisterMask);
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const uint32_t VFPMask = std::get<1>(RegisterMask);
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OS << '{';
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ListSeparator LS;
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for (unsigned RI = 0, RE = 11; RI < RE; ++RI)
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if (GPRMask & (1 << RI))
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OS << LS << GPRRegisterNames[RI];
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for (unsigned RI = 0, RE = 32; RI < RE; ++RI)
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if (VFPMask & (1 << RI))
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OS << LS << "d" << unsigned(RI);
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for (unsigned RI = 11, RE = 16; RI < RE; ++RI)
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if (GPRMask & (1 << RI))
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OS << LS << GPRRegisterNames[RI];
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printRange(OS, GPRMask, LS, 0, 12, 'r');
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printRange(OS, VFPMask, LS, 0, 31, 'd');
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if (GPRMask & (1 << 14))
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OS << LS << "lr";
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if (GPRMask & (1 << 15))
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OS << LS << "pc";
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OS << '}';
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}
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@ -346,7 +365,7 @@ bool Decoder::opcode_1100xxxx(const uint8_t *OC, unsigned &Offset,
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bool Decoder::opcode_11010Lxx(const uint8_t *OC, unsigned &Offset,
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unsigned Length, bool Prologue) {
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unsigned Link = (OC[Offset] & 0x4) >> 3;
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unsigned Link = (OC[Offset] & 0x4) >> 2;
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unsigned Count = (OC[Offset] & 0x3);
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uint16_t GPRMask = (Link << (Prologue ? 14 : 15))
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@ -407,8 +426,8 @@ bool Decoder::opcode_111010xx(const uint8_t *OC, unsigned &Offset,
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bool Decoder::opcode_1110110L(const uint8_t *OC, unsigned &Offset,
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unsigned Length, bool Prologue) {
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uint8_t GPRMask = ((OC[Offset + 0] & 0x01) << (Prologue ? 14 : 15))
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| ((OC[Offset + 1] & 0xff) << 0);
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uint16_t GPRMask = ((OC[Offset + 0] & 0x01) << (Prologue ? 14 : 15))
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| ((OC[Offset + 1] & 0xff) << 0);
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SW.startLine() << format("0x%02x 0x%02x ; %s ", OC[Offset + 0],
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OC[Offset + 1], Prologue ? "push" : "pop");
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@ -437,11 +456,13 @@ bool Decoder::opcode_11101110(const uint8_t *OC, unsigned &Offset,
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bool Decoder::opcode_11101111(const uint8_t *OC, unsigned &Offset,
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unsigned Length, bool Prologue) {
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assert(!Prologue && "may not be used in prologue");
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if (OC[Offset + 1] & 0xf0)
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SW.startLine() << format("0x%02x 0x%02x ; reserved\n",
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OC[Offset + 0], OC[Offset + 1]);
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else if (Prologue)
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SW.startLine()
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<< format("0x%02x 0x%02x ; str.w lr, [sp, #-%u]!\n",
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OC[Offset + 0], OC[Offset + 1], OC[Offset + 1] << 2);
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else
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SW.startLine()
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<< format("0x%02x 0x%02x ; ldr.w lr, [sp], #%u\n",
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@ -455,7 +476,7 @@ bool Decoder::opcode_11110101(const uint8_t *OC, unsigned &Offset,
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unsigned Length, bool Prologue) {
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unsigned Start = (OC[Offset + 1] & 0xf0) >> 4;
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unsigned End = (OC[Offset + 1] & 0x0f) >> 0;
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uint32_t VFPMask = ((1 << (End - Start)) - 1) << Start;
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uint32_t VFPMask = ((1 << (End + 1 - Start)) - 1) << Start;
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SW.startLine() << format("0x%02x 0x%02x ; %s ", OC[Offset + 0],
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OC[Offset + 1], Prologue ? "vpush" : "vpop");
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@ -470,7 +491,7 @@ bool Decoder::opcode_11110110(const uint8_t *OC, unsigned &Offset,
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unsigned Length, bool Prologue) {
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unsigned Start = (OC[Offset + 1] & 0xf0) >> 4;
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unsigned End = (OC[Offset + 1] & 0x0f) >> 0;
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uint32_t VFPMask = ((1 << (End - Start)) - 1) << 16;
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uint32_t VFPMask = ((1 << (End + 1 - Start)) - 1) << (16 + Start);
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SW.startLine() << format("0x%02x 0x%02x ; %s ", OC[Offset + 0],
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OC[Offset + 1], Prologue ? "vpush" : "vpop");
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@ -553,14 +574,14 @@ bool Decoder::opcode_11111100(const uint8_t *OC, unsigned &Offset,
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bool Decoder::opcode_11111101(const uint8_t *OC, unsigned &Offset,
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unsigned Length, bool Prologue) {
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SW.startLine() << format("0x%02x ; b\n", OC[Offset]);
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SW.startLine() << format("0x%02x ; bx <reg>\n", OC[Offset]);
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++Offset;
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return true;
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}
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bool Decoder::opcode_11111110(const uint8_t *OC, unsigned &Offset,
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unsigned Length, bool Prologue) {
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SW.startLine() << format("0x%02x ; b.w\n", OC[Offset]);
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SW.startLine() << format("0x%02x ; b.w <target>\n", OC[Offset]);
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++Offset;
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return true;
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}
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|
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@ -948,7 +969,7 @@ bool Decoder::dumpXDataRecord(const COFFObjectFile &COFF,
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if (XData.E()) {
|
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ArrayRef<uint8_t> UC = XData.UnwindByteCode();
|
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if (isAArch64 || !XData.F()) {
|
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{
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ListScope PS(SW, "Prologue");
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||||
decodeOpcodes(UC, 0, /*Prologue=*/true);
|
||||
}
|
||||
|
|
@ -971,8 +992,9 @@ bool Decoder::dumpXDataRecord(const COFFObjectFile &COFF,
|
|||
SW.printNumber("EpilogueStartIndex",
|
||||
isAArch64 ? ES.EpilogueStartIndexAArch64()
|
||||
: ES.EpilogueStartIndexARM());
|
||||
if (ES.ES & ~0xffc3ffff)
|
||||
SW.printNumber("ReservedBits", (ES.ES >> 18) & 0xF);
|
||||
unsigned ReservedMask = isAArch64 ? 0xF : 0x3;
|
||||
if ((ES.ES >> 18) & ReservedMask)
|
||||
SW.printNumber("ReservedBits", (ES.ES >> 18) & ReservedMask);
|
||||
|
||||
ListScope Opcodes(SW, "Opcodes");
|
||||
decodeOpcodes(XData.UnwindByteCode(),
|
||||
|
|
|
|||
Loading…
Reference in New Issue