forked from OSchip/llvm-project
ARM: move the builtins libcall CC setup
Move the target specific setup into the target specific lowering setup. As pointed out by Anton, the initial change was moving this too high up the stack resulting in a violation of the layering (the target generic code path setup target specific bits). Sink this into the ARM specific setup. NFC. llvm-svn: 281088
This commit is contained in:
Saleem Abdulrasool
parent
f27ef41434
commit
92e33a3ebc
|
|
@ -489,173 +489,9 @@ static void InitLibcallNames(const char **Names, const Triple &TT) {
|
||||||
}
|
}
|
||||||
|
|
||||||
/// Set default libcall CallingConvs.
|
/// Set default libcall CallingConvs.
|
||||||
static void InitLibcallCallingConvs(CallingConv::ID *CCs, const Triple &T) {
|
static void InitLibcallCallingConvs(CallingConv::ID *CCs) {
|
||||||
for (int LC = 0; LC < RTLIB::UNKNOWN_LIBCALL; ++LC)
|
for (int LC = 0; LC < RTLIB::UNKNOWN_LIBCALL; ++LC)
|
||||||
CCs[LC] = CallingConv::C;
|
CCs[LC] = CallingConv::C;
|
||||||
|
|
||||||
// The builtins on ARM always use AAPCS, irrespective of wheter C is AAPCS or
|
|
||||||
// AAPCS_VFP.
|
|
||||||
if (T.getArch() == Triple::arm || T.getArch() == Triple::thumb)
|
|
||||||
for (const auto LC : {
|
|
||||||
RTLIB::SHL_I16,
|
|
||||||
RTLIB::SHL_I32,
|
|
||||||
RTLIB::SHL_I64,
|
|
||||||
RTLIB::SHL_I128,
|
|
||||||
RTLIB::SRL_I16,
|
|
||||||
RTLIB::SRL_I32,
|
|
||||||
RTLIB::SRL_I64,
|
|
||||||
RTLIB::SRL_I128,
|
|
||||||
RTLIB::SRA_I16,
|
|
||||||
RTLIB::SRA_I32,
|
|
||||||
RTLIB::SRA_I64,
|
|
||||||
RTLIB::SRA_I128,
|
|
||||||
RTLIB::MUL_I8,
|
|
||||||
RTLIB::MUL_I16,
|
|
||||||
RTLIB::MUL_I32,
|
|
||||||
RTLIB::MUL_I64,
|
|
||||||
RTLIB::MUL_I128,
|
|
||||||
RTLIB::MULO_I32,
|
|
||||||
RTLIB::MULO_I64,
|
|
||||||
RTLIB::MULO_I128,
|
|
||||||
RTLIB::SDIV_I8,
|
|
||||||
RTLIB::SDIV_I16,
|
|
||||||
RTLIB::SDIV_I32,
|
|
||||||
RTLIB::SDIV_I64,
|
|
||||||
RTLIB::SDIV_I128,
|
|
||||||
RTLIB::UDIV_I8,
|
|
||||||
RTLIB::UDIV_I16,
|
|
||||||
RTLIB::UDIV_I32,
|
|
||||||
RTLIB::UDIV_I64,
|
|
||||||
RTLIB::UDIV_I128,
|
|
||||||
RTLIB::SREM_I8,
|
|
||||||
RTLIB::SREM_I16,
|
|
||||||
RTLIB::SREM_I32,
|
|
||||||
RTLIB::SREM_I64,
|
|
||||||
RTLIB::SREM_I128,
|
|
||||||
RTLIB::UREM_I8,
|
|
||||||
RTLIB::UREM_I16,
|
|
||||||
RTLIB::UREM_I32,
|
|
||||||
RTLIB::UREM_I64,
|
|
||||||
RTLIB::UREM_I128,
|
|
||||||
RTLIB::SDIVREM_I8,
|
|
||||||
RTLIB::SDIVREM_I16,
|
|
||||||
RTLIB::SDIVREM_I32,
|
|
||||||
RTLIB::SDIVREM_I64,
|
|
||||||
RTLIB::SDIVREM_I128,
|
|
||||||
RTLIB::UDIVREM_I8,
|
|
||||||
RTLIB::UDIVREM_I16,
|
|
||||||
RTLIB::UDIVREM_I32,
|
|
||||||
RTLIB::UDIVREM_I64,
|
|
||||||
RTLIB::UDIVREM_I128,
|
|
||||||
RTLIB::NEG_I32,
|
|
||||||
RTLIB::NEG_I64,
|
|
||||||
RTLIB::ADD_F32,
|
|
||||||
RTLIB::ADD_F64,
|
|
||||||
RTLIB::ADD_F80,
|
|
||||||
RTLIB::ADD_F128,
|
|
||||||
RTLIB::SUB_F32,
|
|
||||||
RTLIB::SUB_F64,
|
|
||||||
RTLIB::SUB_F80,
|
|
||||||
RTLIB::SUB_F128,
|
|
||||||
RTLIB::MUL_F32,
|
|
||||||
RTLIB::MUL_F64,
|
|
||||||
RTLIB::MUL_F80,
|
|
||||||
RTLIB::MUL_F128,
|
|
||||||
RTLIB::DIV_F32,
|
|
||||||
RTLIB::DIV_F64,
|
|
||||||
RTLIB::DIV_F80,
|
|
||||||
RTLIB::DIV_F128,
|
|
||||||
RTLIB::POWI_F32,
|
|
||||||
RTLIB::POWI_F64,
|
|
||||||
RTLIB::POWI_F80,
|
|
||||||
RTLIB::POWI_F128,
|
|
||||||
RTLIB::FPEXT_F64_F128,
|
|
||||||
RTLIB::FPEXT_F32_F128,
|
|
||||||
RTLIB::FPEXT_F32_F64,
|
|
||||||
RTLIB::FPEXT_F16_F32,
|
|
||||||
RTLIB::FPROUND_F32_F16,
|
|
||||||
RTLIB::FPROUND_F64_F16,
|
|
||||||
RTLIB::FPROUND_F80_F16,
|
|
||||||
RTLIB::FPROUND_F128_F16,
|
|
||||||
RTLIB::FPROUND_F64_F32,
|
|
||||||
RTLIB::FPROUND_F80_F32,
|
|
||||||
RTLIB::FPROUND_F128_F32,
|
|
||||||
RTLIB::FPROUND_F80_F64,
|
|
||||||
RTLIB::FPROUND_F128_F64,
|
|
||||||
RTLIB::FPTOSINT_F32_I32,
|
|
||||||
RTLIB::FPTOSINT_F32_I64,
|
|
||||||
RTLIB::FPTOSINT_F32_I128,
|
|
||||||
RTLIB::FPTOSINT_F64_I32,
|
|
||||||
RTLIB::FPTOSINT_F64_I64,
|
|
||||||
RTLIB::FPTOSINT_F64_I128,
|
|
||||||
RTLIB::FPTOSINT_F80_I32,
|
|
||||||
RTLIB::FPTOSINT_F80_I64,
|
|
||||||
RTLIB::FPTOSINT_F80_I128,
|
|
||||||
RTLIB::FPTOSINT_F128_I32,
|
|
||||||
RTLIB::FPTOSINT_F128_I64,
|
|
||||||
RTLIB::FPTOSINT_F128_I128,
|
|
||||||
RTLIB::FPTOUINT_F32_I32,
|
|
||||||
RTLIB::FPTOUINT_F32_I64,
|
|
||||||
RTLIB::FPTOUINT_F32_I128,
|
|
||||||
RTLIB::FPTOUINT_F64_I32,
|
|
||||||
RTLIB::FPTOUINT_F64_I64,
|
|
||||||
RTLIB::FPTOUINT_F64_I128,
|
|
||||||
RTLIB::FPTOUINT_F80_I32,
|
|
||||||
RTLIB::FPTOUINT_F80_I64,
|
|
||||||
RTLIB::FPTOUINT_F80_I128,
|
|
||||||
RTLIB::FPTOUINT_F128_I32,
|
|
||||||
RTLIB::FPTOUINT_F128_I64,
|
|
||||||
RTLIB::FPTOUINT_F128_I128,
|
|
||||||
RTLIB::SINTTOFP_I32_F32,
|
|
||||||
RTLIB::SINTTOFP_I32_F64,
|
|
||||||
RTLIB::SINTTOFP_I32_F80,
|
|
||||||
RTLIB::SINTTOFP_I32_F128,
|
|
||||||
RTLIB::SINTTOFP_I64_F32,
|
|
||||||
RTLIB::SINTTOFP_I64_F64,
|
|
||||||
RTLIB::SINTTOFP_I64_F80,
|
|
||||||
RTLIB::SINTTOFP_I64_F128,
|
|
||||||
RTLIB::SINTTOFP_I128_F32,
|
|
||||||
RTLIB::SINTTOFP_I128_F64,
|
|
||||||
RTLIB::SINTTOFP_I128_F80,
|
|
||||||
RTLIB::SINTTOFP_I128_F128,
|
|
||||||
RTLIB::UINTTOFP_I32_F32,
|
|
||||||
RTLIB::UINTTOFP_I32_F64,
|
|
||||||
RTLIB::UINTTOFP_I32_F80,
|
|
||||||
RTLIB::UINTTOFP_I32_F128,
|
|
||||||
RTLIB::UINTTOFP_I64_F32,
|
|
||||||
RTLIB::UINTTOFP_I64_F64,
|
|
||||||
RTLIB::UINTTOFP_I64_F80,
|
|
||||||
RTLIB::UINTTOFP_I64_F128,
|
|
||||||
RTLIB::UINTTOFP_I128_F32,
|
|
||||||
RTLIB::UINTTOFP_I128_F64,
|
|
||||||
RTLIB::UINTTOFP_I128_F80,
|
|
||||||
RTLIB::UINTTOFP_I128_F128,
|
|
||||||
RTLIB::OEQ_F32,
|
|
||||||
RTLIB::OEQ_F64,
|
|
||||||
RTLIB::OEQ_F128,
|
|
||||||
RTLIB::UNE_F32,
|
|
||||||
RTLIB::UNE_F64,
|
|
||||||
RTLIB::UNE_F128,
|
|
||||||
RTLIB::OGE_F32,
|
|
||||||
RTLIB::OGE_F64,
|
|
||||||
RTLIB::OGE_F128,
|
|
||||||
RTLIB::OLT_F32,
|
|
||||||
RTLIB::OLT_F64,
|
|
||||||
RTLIB::OLT_F128,
|
|
||||||
RTLIB::OLE_F32,
|
|
||||||
RTLIB::OLE_F64,
|
|
||||||
RTLIB::OLE_F128,
|
|
||||||
RTLIB::OGT_F32,
|
|
||||||
RTLIB::OGT_F64,
|
|
||||||
RTLIB::OGT_F128,
|
|
||||||
RTLIB::UO_F32,
|
|
||||||
RTLIB::UO_F64,
|
|
||||||
RTLIB::UO_F128,
|
|
||||||
RTLIB::O_F32,
|
|
||||||
RTLIB::O_F64,
|
|
||||||
RTLIB::O_F128,
|
|
||||||
})
|
|
||||||
CCs[LC] = CallingConv::ARM_AAPCS;
|
|
||||||
}
|
}
|
||||||
|
|
||||||
/// getFPEXT - Return the FPEXT_*_* value for the given types, or
|
/// getFPEXT - Return the FPEXT_*_* value for the given types, or
|
||||||
|
|
@ -997,7 +833,7 @@ TargetLoweringBase::TargetLoweringBase(const TargetMachine &tm) : TM(tm) {
|
||||||
|
|
||||||
InitLibcallNames(LibcallRoutineNames, TM.getTargetTriple());
|
InitLibcallNames(LibcallRoutineNames, TM.getTargetTriple());
|
||||||
InitCmpLibcallCCs(CmpLibcallCCs);
|
InitCmpLibcallCCs(CmpLibcallCCs);
|
||||||
InitLibcallCallingConvs(LibcallCallingConvs, TM.getTargetTriple());
|
InitLibcallCallingConvs(LibcallCallingConvs);
|
||||||
}
|
}
|
||||||
|
|
||||||
void TargetLoweringBase::initActions() {
|
void TargetLoweringBase::initActions() {
|
||||||
|
|
|
||||||
|
|
@ -80,6 +80,171 @@ namespace {
|
||||||
};
|
};
|
||||||
}
|
}
|
||||||
|
|
||||||
|
void ARMTargetLowering::InitLibcallCallingConvs() {
|
||||||
|
// The builtins on ARM always use AAPCS, irrespective of wheter C is AAPCS or
|
||||||
|
// AAPCS_VFP.
|
||||||
|
for (const auto LC : {
|
||||||
|
RTLIB::SHL_I16,
|
||||||
|
RTLIB::SHL_I32,
|
||||||
|
RTLIB::SHL_I64,
|
||||||
|
RTLIB::SHL_I128,
|
||||||
|
RTLIB::SRL_I16,
|
||||||
|
RTLIB::SRL_I32,
|
||||||
|
RTLIB::SRL_I64,
|
||||||
|
RTLIB::SRL_I128,
|
||||||
|
RTLIB::SRA_I16,
|
||||||
|
RTLIB::SRA_I32,
|
||||||
|
RTLIB::SRA_I64,
|
||||||
|
RTLIB::SRA_I128,
|
||||||
|
RTLIB::MUL_I8,
|
||||||
|
RTLIB::MUL_I16,
|
||||||
|
RTLIB::MUL_I32,
|
||||||
|
RTLIB::MUL_I64,
|
||||||
|
RTLIB::MUL_I128,
|
||||||
|
RTLIB::MULO_I32,
|
||||||
|
RTLIB::MULO_I64,
|
||||||
|
RTLIB::MULO_I128,
|
||||||
|
RTLIB::SDIV_I8,
|
||||||
|
RTLIB::SDIV_I16,
|
||||||
|
RTLIB::SDIV_I32,
|
||||||
|
RTLIB::SDIV_I64,
|
||||||
|
RTLIB::SDIV_I128,
|
||||||
|
RTLIB::UDIV_I8,
|
||||||
|
RTLIB::UDIV_I16,
|
||||||
|
RTLIB::UDIV_I32,
|
||||||
|
RTLIB::UDIV_I64,
|
||||||
|
RTLIB::UDIV_I128,
|
||||||
|
RTLIB::SREM_I8,
|
||||||
|
RTLIB::SREM_I16,
|
||||||
|
RTLIB::SREM_I32,
|
||||||
|
RTLIB::SREM_I64,
|
||||||
|
RTLIB::SREM_I128,
|
||||||
|
RTLIB::UREM_I8,
|
||||||
|
RTLIB::UREM_I16,
|
||||||
|
RTLIB::UREM_I32,
|
||||||
|
RTLIB::UREM_I64,
|
||||||
|
RTLIB::UREM_I128,
|
||||||
|
RTLIB::SDIVREM_I8,
|
||||||
|
RTLIB::SDIVREM_I16,
|
||||||
|
RTLIB::SDIVREM_I32,
|
||||||
|
RTLIB::SDIVREM_I64,
|
||||||
|
RTLIB::SDIVREM_I128,
|
||||||
|
RTLIB::UDIVREM_I8,
|
||||||
|
RTLIB::UDIVREM_I16,
|
||||||
|
RTLIB::UDIVREM_I32,
|
||||||
|
RTLIB::UDIVREM_I64,
|
||||||
|
RTLIB::UDIVREM_I128,
|
||||||
|
RTLIB::NEG_I32,
|
||||||
|
RTLIB::NEG_I64,
|
||||||
|
RTLIB::ADD_F32,
|
||||||
|
RTLIB::ADD_F64,
|
||||||
|
RTLIB::ADD_F80,
|
||||||
|
RTLIB::ADD_F128,
|
||||||
|
RTLIB::SUB_F32,
|
||||||
|
RTLIB::SUB_F64,
|
||||||
|
RTLIB::SUB_F80,
|
||||||
|
RTLIB::SUB_F128,
|
||||||
|
RTLIB::MUL_F32,
|
||||||
|
RTLIB::MUL_F64,
|
||||||
|
RTLIB::MUL_F80,
|
||||||
|
RTLIB::MUL_F128,
|
||||||
|
RTLIB::DIV_F32,
|
||||||
|
RTLIB::DIV_F64,
|
||||||
|
RTLIB::DIV_F80,
|
||||||
|
RTLIB::DIV_F128,
|
||||||
|
RTLIB::POWI_F32,
|
||||||
|
RTLIB::POWI_F64,
|
||||||
|
RTLIB::POWI_F80,
|
||||||
|
RTLIB::POWI_F128,
|
||||||
|
RTLIB::FPEXT_F64_F128,
|
||||||
|
RTLIB::FPEXT_F32_F128,
|
||||||
|
RTLIB::FPEXT_F32_F64,
|
||||||
|
RTLIB::FPEXT_F16_F32,
|
||||||
|
RTLIB::FPROUND_F32_F16,
|
||||||
|
RTLIB::FPROUND_F64_F16,
|
||||||
|
RTLIB::FPROUND_F80_F16,
|
||||||
|
RTLIB::FPROUND_F128_F16,
|
||||||
|
RTLIB::FPROUND_F64_F32,
|
||||||
|
RTLIB::FPROUND_F80_F32,
|
||||||
|
RTLIB::FPROUND_F128_F32,
|
||||||
|
RTLIB::FPROUND_F80_F64,
|
||||||
|
RTLIB::FPROUND_F128_F64,
|
||||||
|
RTLIB::FPTOSINT_F32_I32,
|
||||||
|
RTLIB::FPTOSINT_F32_I64,
|
||||||
|
RTLIB::FPTOSINT_F32_I128,
|
||||||
|
RTLIB::FPTOSINT_F64_I32,
|
||||||
|
RTLIB::FPTOSINT_F64_I64,
|
||||||
|
RTLIB::FPTOSINT_F64_I128,
|
||||||
|
RTLIB::FPTOSINT_F80_I32,
|
||||||
|
RTLIB::FPTOSINT_F80_I64,
|
||||||
|
RTLIB::FPTOSINT_F80_I128,
|
||||||
|
RTLIB::FPTOSINT_F128_I32,
|
||||||
|
RTLIB::FPTOSINT_F128_I64,
|
||||||
|
RTLIB::FPTOSINT_F128_I128,
|
||||||
|
RTLIB::FPTOUINT_F32_I32,
|
||||||
|
RTLIB::FPTOUINT_F32_I64,
|
||||||
|
RTLIB::FPTOUINT_F32_I128,
|
||||||
|
RTLIB::FPTOUINT_F64_I32,
|
||||||
|
RTLIB::FPTOUINT_F64_I64,
|
||||||
|
RTLIB::FPTOUINT_F64_I128,
|
||||||
|
RTLIB::FPTOUINT_F80_I32,
|
||||||
|
RTLIB::FPTOUINT_F80_I64,
|
||||||
|
RTLIB::FPTOUINT_F80_I128,
|
||||||
|
RTLIB::FPTOUINT_F128_I32,
|
||||||
|
RTLIB::FPTOUINT_F128_I64,
|
||||||
|
RTLIB::FPTOUINT_F128_I128,
|
||||||
|
RTLIB::SINTTOFP_I32_F32,
|
||||||
|
RTLIB::SINTTOFP_I32_F64,
|
||||||
|
RTLIB::SINTTOFP_I32_F80,
|
||||||
|
RTLIB::SINTTOFP_I32_F128,
|
||||||
|
RTLIB::SINTTOFP_I64_F32,
|
||||||
|
RTLIB::SINTTOFP_I64_F64,
|
||||||
|
RTLIB::SINTTOFP_I64_F80,
|
||||||
|
RTLIB::SINTTOFP_I64_F128,
|
||||||
|
RTLIB::SINTTOFP_I128_F32,
|
||||||
|
RTLIB::SINTTOFP_I128_F64,
|
||||||
|
RTLIB::SINTTOFP_I128_F80,
|
||||||
|
RTLIB::SINTTOFP_I128_F128,
|
||||||
|
RTLIB::UINTTOFP_I32_F32,
|
||||||
|
RTLIB::UINTTOFP_I32_F64,
|
||||||
|
RTLIB::UINTTOFP_I32_F80,
|
||||||
|
RTLIB::UINTTOFP_I32_F128,
|
||||||
|
RTLIB::UINTTOFP_I64_F32,
|
||||||
|
RTLIB::UINTTOFP_I64_F64,
|
||||||
|
RTLIB::UINTTOFP_I64_F80,
|
||||||
|
RTLIB::UINTTOFP_I64_F128,
|
||||||
|
RTLIB::UINTTOFP_I128_F32,
|
||||||
|
RTLIB::UINTTOFP_I128_F64,
|
||||||
|
RTLIB::UINTTOFP_I128_F80,
|
||||||
|
RTLIB::UINTTOFP_I128_F128,
|
||||||
|
RTLIB::OEQ_F32,
|
||||||
|
RTLIB::OEQ_F64,
|
||||||
|
RTLIB::OEQ_F128,
|
||||||
|
RTLIB::UNE_F32,
|
||||||
|
RTLIB::UNE_F64,
|
||||||
|
RTLIB::UNE_F128,
|
||||||
|
RTLIB::OGE_F32,
|
||||||
|
RTLIB::OGE_F64,
|
||||||
|
RTLIB::OGE_F128,
|
||||||
|
RTLIB::OLT_F32,
|
||||||
|
RTLIB::OLT_F64,
|
||||||
|
RTLIB::OLT_F128,
|
||||||
|
RTLIB::OLE_F32,
|
||||||
|
RTLIB::OLE_F64,
|
||||||
|
RTLIB::OLE_F128,
|
||||||
|
RTLIB::OGT_F32,
|
||||||
|
RTLIB::OGT_F64,
|
||||||
|
RTLIB::OGT_F128,
|
||||||
|
RTLIB::UO_F32,
|
||||||
|
RTLIB::UO_F64,
|
||||||
|
RTLIB::UO_F128,
|
||||||
|
RTLIB::O_F32,
|
||||||
|
RTLIB::O_F64,
|
||||||
|
RTLIB::O_F128,
|
||||||
|
})
|
||||||
|
setLibcallCallingConv(LC, CallingConv::ARM_AAPCS);
|
||||||
|
}
|
||||||
|
|
||||||
// The APCS parameter registers.
|
// The APCS parameter registers.
|
||||||
static const MCPhysReg GPRArgRegs[] = {
|
static const MCPhysReg GPRArgRegs[] = {
|
||||||
ARM::R0, ARM::R1, ARM::R2, ARM::R3
|
ARM::R0, ARM::R1, ARM::R2, ARM::R3
|
||||||
|
|
@ -167,6 +332,8 @@ ARMTargetLowering::ARMTargetLowering(const TargetMachine &TM,
|
||||||
|
|
||||||
setBooleanVectorContents(ZeroOrNegativeOneBooleanContent);
|
setBooleanVectorContents(ZeroOrNegativeOneBooleanContent);
|
||||||
|
|
||||||
|
InitLibcallCallingConvs();
|
||||||
|
|
||||||
if (Subtarget->isTargetMachO()) {
|
if (Subtarget->isTargetMachO()) {
|
||||||
// Uses VFP for Thumb libfuncs if available.
|
// Uses VFP for Thumb libfuncs if available.
|
||||||
if (Subtarget->isThumb() && Subtarget->hasVFP2() &&
|
if (Subtarget->isThumb() && Subtarget->hasVFP2() &&
|
||||||
|
|
|
||||||
|
|
@ -506,6 +506,8 @@ namespace llvm {
|
||||||
|
|
||||||
bool HasStandaloneRem = true;
|
bool HasStandaloneRem = true;
|
||||||
|
|
||||||
|
void InitLibcallCallingConvs();
|
||||||
|
|
||||||
void addTypeForNEON(MVT VT, MVT PromotedLdStVT, MVT PromotedBitwiseVT);
|
void addTypeForNEON(MVT VT, MVT PromotedLdStVT, MVT PromotedBitwiseVT);
|
||||||
void addDRTypeForNEON(MVT VT);
|
void addDRTypeForNEON(MVT VT);
|
||||||
void addQRTypeForNEON(MVT VT);
|
void addQRTypeForNEON(MVT VT);
|
||||||
|
|
|
||||||
Loading…
Reference in New Issue