forked from OSchip/llvm-project
[NFC] Rename AttributeList::hasFnAttribute() -> hasFnAttr()
This is more consistent with similar methods.
This commit is contained in:
parent
a0c42ca56c
commit
92ce6db9ee
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@ -5232,7 +5232,7 @@ RValue CodeGenFunction::EmitCall(const CGFunctionInfo &CallInfo,
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CannotThrow = true;
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} else {
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// Otherwise, nounwind call sites will never throw.
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CannotThrow = Attrs.hasFnAttribute(llvm::Attribute::NoUnwind);
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CannotThrow = Attrs.hasFnAttr(llvm::Attribute::NoUnwind);
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if (auto *FPtr = dyn_cast<llvm::Function>(CalleePtr))
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if (FPtr->hasFnAttribute(llvm::Attribute::NoUnwind))
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@ -654,11 +654,11 @@ public:
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/// Equivalent to hasAttribute(AttributeList::FunctionIndex, Kind) but
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/// may be faster.
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bool hasFnAttribute(Attribute::AttrKind Kind) const;
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bool hasFnAttr(Attribute::AttrKind Kind) const;
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/// Equivalent to hasAttribute(AttributeList::FunctionIndex, Kind) but
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/// may be faster.
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bool hasFnAttribute(StringRef Kind) const;
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bool hasFnAttr(StringRef Kind) const;
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/// Return true if the specified attribute is set for at least one
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/// parameter or for the return value. If Index is not nullptr, the index
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@ -353,12 +353,12 @@ public:
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/// Return true if the function has the attribute.
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bool hasFnAttribute(Attribute::AttrKind Kind) const {
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return AttributeSets.hasFnAttribute(Kind);
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return AttributeSets.hasFnAttr(Kind);
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}
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/// Return true if the function has the attribute.
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bool hasFnAttribute(StringRef Kind) const {
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return AttributeSets.hasFnAttribute(Kind);
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return AttributeSets.hasFnAttr(Kind);
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}
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/// Return the attribute for the given attribute kind.
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@ -2258,7 +2258,7 @@ private:
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bool hasFnAttrOnCalledFunction(StringRef Kind) const;
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template <typename AttrKind> bool hasFnAttrImpl(AttrKind Kind) const {
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if (Attrs.hasFnAttribute(Kind))
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if (Attrs.hasFnAttr(Kind))
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return true;
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// Operand bundles override attributes on the called function, but don't
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@ -479,7 +479,7 @@ static void computeFunctionSummary(
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F.hasFnAttribute(Attribute::NoRecurse), F.returnDoesNotAlias(),
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// FIXME: refactor this to use the same code that inliner is using.
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// Don't try to import functions with noinline attribute.
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F.getAttributes().hasFnAttribute(Attribute::NoInline),
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F.getAttributes().hasFnAttr(Attribute::NoInline),
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F.hasFnAttribute(Attribute::AlwaysInline)};
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std::vector<FunctionSummary::ParamAccess> ParamAccesses;
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if (auto *SSI = GetSSICallback(F))
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@ -1392,7 +1392,7 @@ void MachineVerifier::verifyPreISelGenericInstruction(const MachineInstr *MI) {
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AttributeList Attrs
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= Intrinsic::getAttributes(MF->getFunction().getContext(),
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static_cast<Intrinsic::ID>(IntrID));
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bool DeclHasSideEffects = !Attrs.hasFnAttribute(Attribute::ReadNone);
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bool DeclHasSideEffects = !Attrs.hasFnAttr(Attribute::ReadNone);
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if (NoSideEffects && DeclHasSideEffects) {
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report("G_INTRINSIC used with intrinsic that accesses memory", MI);
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break;
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@ -6419,7 +6419,7 @@ void SelectionDAGBuilder::visitIntrinsicCall(const CallInst &I,
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SDValue Op = getValue(I.getArgOperand(0));
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SDNodeFlags Flags;
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Flags.setNoFPExcept(
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!F.getAttributes().hasFnAttribute(llvm::Attribute::StrictFP));
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!F.getAttributes().hasFnAttr(llvm::Attribute::StrictFP));
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// If ISD::ISNAN should be expanded, do it right now, because the expansion
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// can use illegal types. Making expansion early allows to legalize these
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@ -4336,7 +4336,7 @@ SDValue TargetLowering::SimplifySetCC(EVT VT, SDValue N0, SDValue N1,
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// When division is cheap or optimizing for minimum size,
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// fall through to DIVREM creation by skipping this fold.
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if (!isIntDivCheap(VT, Attr) && !Attr.hasFnAttribute(Attribute::MinSize)) {
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if (!isIntDivCheap(VT, Attr) && !Attr.hasFnAttr(Attribute::MinSize)) {
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if (N0.getOpcode() == ISD::UREM) {
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if (SDValue Folded = buildUREMEqFold(VT, N0, N1, Cond, DCI, dl))
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return Folded;
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@ -1397,11 +1397,11 @@ bool AttributeList::hasAttributes(unsigned Index) const {
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return getAttributes(Index).hasAttributes();
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}
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bool AttributeList::hasFnAttribute(Attribute::AttrKind Kind) const {
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bool AttributeList::hasFnAttr(Attribute::AttrKind Kind) const {
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return pImpl && pImpl->hasFnAttribute(Kind);
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}
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bool AttributeList::hasFnAttribute(StringRef Kind) const {
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bool AttributeList::hasFnAttr(StringRef Kind) const {
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return hasAttribute(AttributeList::FunctionIndex, Kind);
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}
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@ -352,13 +352,13 @@ bool CallBase::paramHasAttr(unsigned ArgNo, Attribute::AttrKind Kind) const {
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bool CallBase::hasFnAttrOnCalledFunction(Attribute::AttrKind Kind) const {
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if (const Function *F = getCalledFunction())
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return F->getAttributes().hasFnAttribute(Kind);
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return F->getAttributes().hasFnAttr(Kind);
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return false;
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}
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bool CallBase::hasFnAttrOnCalledFunction(StringRef Kind) const {
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if (const Function *F = getCalledFunction())
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return F->getAttributes().hasFnAttribute(Kind);
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return F->getAttributes().hasFnAttr(Kind);
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return false;
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}
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@ -1824,7 +1824,7 @@ void Verifier::verifyParameterAttrs(AttributeSet Attrs, Type *Ty,
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void Verifier::checkUnsignedBaseTenFuncAttr(AttributeList Attrs, StringRef Attr,
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const Value *V) {
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if (Attrs.hasFnAttribute(Attr)) {
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if (Attrs.hasFnAttr(Attr)) {
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StringRef S = Attrs.getAttribute(AttributeList::FunctionIndex, Attr)
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.getValueAsString();
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unsigned N;
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@ -1939,50 +1939,50 @@ void Verifier::verifyFunctionAttrs(FunctionType *FT, AttributeList Attrs,
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"' does not apply to functions!",
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V);
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Assert(!(Attrs.hasFnAttribute(Attribute::ReadNone) &&
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Attrs.hasFnAttribute(Attribute::ReadOnly)),
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Assert(!(Attrs.hasFnAttr(Attribute::ReadNone) &&
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Attrs.hasFnAttr(Attribute::ReadOnly)),
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"Attributes 'readnone and readonly' are incompatible!", V);
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Assert(!(Attrs.hasFnAttribute(Attribute::ReadNone) &&
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Attrs.hasFnAttribute(Attribute::WriteOnly)),
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Assert(!(Attrs.hasFnAttr(Attribute::ReadNone) &&
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Attrs.hasFnAttr(Attribute::WriteOnly)),
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"Attributes 'readnone and writeonly' are incompatible!", V);
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Assert(!(Attrs.hasFnAttribute(Attribute::ReadOnly) &&
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Attrs.hasFnAttribute(Attribute::WriteOnly)),
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Assert(!(Attrs.hasFnAttr(Attribute::ReadOnly) &&
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Attrs.hasFnAttr(Attribute::WriteOnly)),
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"Attributes 'readonly and writeonly' are incompatible!", V);
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Assert(!(Attrs.hasFnAttribute(Attribute::ReadNone) &&
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Attrs.hasFnAttribute(Attribute::InaccessibleMemOrArgMemOnly)),
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Assert(!(Attrs.hasFnAttr(Attribute::ReadNone) &&
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Attrs.hasFnAttr(Attribute::InaccessibleMemOrArgMemOnly)),
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"Attributes 'readnone and inaccessiblemem_or_argmemonly' are "
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"incompatible!",
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V);
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Assert(!(Attrs.hasFnAttribute(Attribute::ReadNone) &&
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Attrs.hasFnAttribute(Attribute::InaccessibleMemOnly)),
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Assert(!(Attrs.hasFnAttr(Attribute::ReadNone) &&
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Attrs.hasFnAttr(Attribute::InaccessibleMemOnly)),
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"Attributes 'readnone and inaccessiblememonly' are incompatible!", V);
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Assert(!(Attrs.hasFnAttribute(Attribute::NoInline) &&
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Attrs.hasFnAttribute(Attribute::AlwaysInline)),
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Assert(!(Attrs.hasFnAttr(Attribute::NoInline) &&
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Attrs.hasFnAttr(Attribute::AlwaysInline)),
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"Attributes 'noinline and alwaysinline' are incompatible!", V);
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if (Attrs.hasFnAttribute(Attribute::OptimizeNone)) {
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Assert(Attrs.hasFnAttribute(Attribute::NoInline),
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if (Attrs.hasFnAttr(Attribute::OptimizeNone)) {
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Assert(Attrs.hasFnAttr(Attribute::NoInline),
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"Attribute 'optnone' requires 'noinline'!", V);
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Assert(!Attrs.hasFnAttribute(Attribute::OptimizeForSize),
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Assert(!Attrs.hasFnAttr(Attribute::OptimizeForSize),
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"Attributes 'optsize and optnone' are incompatible!", V);
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Assert(!Attrs.hasFnAttribute(Attribute::MinSize),
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Assert(!Attrs.hasFnAttr(Attribute::MinSize),
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"Attributes 'minsize and optnone' are incompatible!", V);
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}
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if (Attrs.hasFnAttribute(Attribute::JumpTable)) {
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if (Attrs.hasFnAttr(Attribute::JumpTable)) {
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const GlobalValue *GV = cast<GlobalValue>(V);
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Assert(GV->hasGlobalUnnamedAddr(),
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"Attribute 'jumptable' requires 'unnamed_addr'", V);
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}
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if (Attrs.hasFnAttribute(Attribute::AllocSize)) {
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if (Attrs.hasFnAttr(Attribute::AllocSize)) {
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std::pair<unsigned, Optional<unsigned>> Args =
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Attrs.getAllocSizeArgs(AttributeList::FunctionIndex);
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@ -2009,7 +2009,7 @@ void Verifier::verifyFunctionAttrs(FunctionType *FT, AttributeList Attrs,
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return;
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}
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if (Attrs.hasFnAttribute(Attribute::VScaleRange)) {
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if (Attrs.hasFnAttr(Attribute::VScaleRange)) {
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std::pair<unsigned, unsigned> Args =
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Attrs.getVScaleRangeArgs(AttributeList::FunctionIndex);
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@ -2017,7 +2017,7 @@ void Verifier::verifyFunctionAttrs(FunctionType *FT, AttributeList Attrs,
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CheckFailed("'vscale_range' minimum cannot be greater than maximum", V);
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}
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if (Attrs.hasFnAttribute("frame-pointer")) {
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if (Attrs.hasFnAttr("frame-pointer")) {
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StringRef FP = Attrs.getAttribute(AttributeList::FunctionIndex,
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"frame-pointer").getValueAsString();
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if (FP != "all" && FP != "non-leaf" && FP != "none")
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@ -2334,7 +2334,7 @@ void Verifier::visitFunction(const Function &F) {
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// On function declarations/definitions, we do not support the builtin
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// attribute. We do not check this in VerifyFunctionAttrs since that is
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// checking for Attributes that can/can not ever be on functions.
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Assert(!Attrs.hasFnAttribute(Attribute::Builtin),
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Assert(!Attrs.hasFnAttr(Attribute::Builtin),
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"Attribute 'builtin' can only be applied to a callsite.", &F);
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Assert(!Attrs.hasAttrSomewhere(Attribute::ElementType),
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@ -3071,14 +3071,14 @@ void Verifier::visitCallBase(CallBase &Call) {
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Assert(Callee->getValueType() == FTy,
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"Intrinsic called with incompatible signature", Call);
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if (Attrs.hasFnAttribute(Attribute::Speculatable)) {
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if (Attrs.hasFnAttr(Attribute::Speculatable)) {
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// Don't allow speculatable on call sites, unless the underlying function
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// declaration is also speculatable.
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Assert(Callee && Callee->isSpeculatable(),
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"speculatable attribute may not apply to call sites", Call);
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}
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if (Attrs.hasFnAttribute(Attribute::Preallocated)) {
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if (Attrs.hasFnAttr(Attribute::Preallocated)) {
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Assert(Call.getCalledFunction()->getIntrinsicID() ==
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Intrinsic::call_preallocated_arg,
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"preallocated as a call site attribute can only be on "
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@ -12053,8 +12053,7 @@ SDValue AArch64TargetLowering::LowerSVEStructLoad(unsigned Intrinsic,
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EVT AArch64TargetLowering::getOptimalMemOpType(
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const MemOp &Op, const AttributeList &FuncAttributes) const {
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bool CanImplicitFloat =
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!FuncAttributes.hasFnAttribute(Attribute::NoImplicitFloat);
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bool CanImplicitFloat = !FuncAttributes.hasFnAttr(Attribute::NoImplicitFloat);
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bool CanUseNEON = Subtarget->hasNEON() && CanImplicitFloat;
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bool CanUseFP = Subtarget->hasFPARMv8() && CanImplicitFloat;
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// Only use AdvSIMD to implement memset of 32-byte and above. It would have
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@ -12084,8 +12083,7 @@ EVT AArch64TargetLowering::getOptimalMemOpType(
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LLT AArch64TargetLowering::getOptimalMemOpLLT(
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const MemOp &Op, const AttributeList &FuncAttributes) const {
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bool CanImplicitFloat =
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!FuncAttributes.hasFnAttribute(Attribute::NoImplicitFloat);
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bool CanImplicitFloat = !FuncAttributes.hasFnAttr(Attribute::NoImplicitFloat);
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bool CanUseNEON = Subtarget->hasNEON() && CanImplicitFloat;
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bool CanUseFP = Subtarget->hasFPARMv8() && CanImplicitFloat;
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// Only use AdvSIMD to implement memset of 32-byte and above. It would have
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@ -17851,7 +17849,7 @@ bool AArch64TargetLowering::isIntDivCheap(EVT VT, AttributeList Attr) const {
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// integer division, leaving the division as-is is a loss even in terms of
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// size, because it will have to be scalarized, while the alternative code
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// sequence can be performed in vector form.
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bool OptSize = Attr.hasFnAttribute(Attribute::MinSize);
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bool OptSize = Attr.hasFnAttr(Attribute::MinSize);
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return OptSize && !VT.isVector();
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}
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@ -1066,7 +1066,7 @@ bool SITargetLowering::getTgtMemIntrinsic(IntrinsicInfo &Info,
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AMDGPU::lookupRsrcIntrinsic(IntrID)) {
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AttributeList Attr = Intrinsic::getAttributes(CI.getContext(),
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(Intrinsic::ID)IntrID);
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if (Attr.hasFnAttribute(Attribute::ReadNone))
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if (Attr.hasFnAttr(Attribute::ReadNone))
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return false;
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SIMachineFunctionInfo *MFI = MF.getInfo<SIMachineFunctionInfo>();
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@ -1081,7 +1081,7 @@ bool SITargetLowering::getTgtMemIntrinsic(IntrinsicInfo &Info,
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}
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Info.flags = MachineMemOperand::MODereferenceable;
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if (Attr.hasFnAttribute(Attribute::ReadOnly)) {
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if (Attr.hasFnAttr(Attribute::ReadOnly)) {
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unsigned DMaskLanes = 4;
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if (RsrcIntr->IsImage) {
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@ -1105,7 +1105,7 @@ bool SITargetLowering::getTgtMemIntrinsic(IntrinsicInfo &Info,
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// FIXME: What does alignment mean for an image?
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Info.opc = ISD::INTRINSIC_W_CHAIN;
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Info.flags |= MachineMemOperand::MOLoad;
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} else if (Attr.hasFnAttribute(Attribute::WriteOnly)) {
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} else if (Attr.hasFnAttr(Attribute::WriteOnly)) {
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Info.opc = ISD::INTRINSIC_VOID;
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Type *DataTy = CI.getArgOperand(0)->getType();
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@ -2289,7 +2289,7 @@ ARMTargetLowering::LowerCall(TargetLowering::CallLoweringInfo &CLI,
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bool PreferIndirect = false;
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// Determine whether this is a non-secure function call.
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if (CLI.CB && CLI.CB->getAttributes().hasFnAttribute("cmse_nonsecure_call"))
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if (CLI.CB && CLI.CB->getAttributes().hasFnAttr("cmse_nonsecure_call"))
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isCmseNSCall = true;
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// Disable tail calls if they're not supported.
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@ -18134,7 +18134,7 @@ EVT ARMTargetLowering::getOptimalMemOpType(
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const MemOp &Op, const AttributeList &FuncAttributes) const {
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// See if we can use NEON instructions for this...
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if ((Op.isMemcpy() || Op.isZeroMemset()) && Subtarget->hasNEON() &&
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!FuncAttributes.hasFnAttribute(Attribute::NoImplicitFloat)) {
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!FuncAttributes.hasFnAttr(Attribute::NoImplicitFloat)) {
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bool Fast;
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if (Op.size() >= 16 &&
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(Op.isAligned(Align(16)) ||
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@ -703,7 +703,7 @@ void NVPTXAsmPrinter::emitDeclarations(const Module &M, raw_ostream &O) {
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for (Module::const_iterator FI = M.begin(), FE = M.end(); FI != FE; ++FI) {
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const Function *F = &*FI;
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if (F->getAttributes().hasFnAttribute("nvptx-libcall-callee")) {
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if (F->getAttributes().hasFnAttr("nvptx-libcall-callee")) {
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emitDeclaration(F, O);
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continue;
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}
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@ -2365,7 +2365,7 @@ unsigned X86TargetLowering::getByValTypeAlignment(Type *Ty,
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/// preferred vector width.
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EVT X86TargetLowering::getOptimalMemOpType(
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const MemOp &Op, const AttributeList &FuncAttributes) const {
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if (!FuncAttributes.hasFnAttribute(Attribute::NoImplicitFloat)) {
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if (!FuncAttributes.hasFnAttr(Attribute::NoImplicitFloat)) {
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if (Op.size() >= 16 &&
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(!Subtarget.isUnalignedMem16Slow() || Op.isAligned(Align(16)))) {
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// FIXME: Check if unaligned 64-byte accesses are slow.
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@ -52761,7 +52761,7 @@ bool X86TargetLowering::isIntDivCheap(EVT VT, AttributeList Attr) const {
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// integer division, leaving the division as-is is a loss even in terms of
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// size, because it will have to be scalarized, while the alternative code
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// sequence can be performed in vector form.
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bool OptSize = Attr.hasFnAttribute(Attribute::MinSize);
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bool OptSize = Attr.hasFnAttr(Attribute::MinSize);
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return OptSize && !VT.isVector();
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}
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@ -92,7 +92,7 @@ static bool IsCallReturnTwice(llvm::MachineOperand &MOp) {
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if (!CalleeFn)
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return false;
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AttributeList Attrs = CalleeFn->getAttributes();
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return Attrs.hasFnAttribute(Attribute::ReturnsTwice);
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return Attrs.hasFnAttr(Attribute::ReturnsTwice);
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}
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bool X86IndirectBranchTrackingPass::runOnMachineFunction(MachineFunction &MF) {
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@ -64,12 +64,12 @@ TEST(Attributes, AddAttributes) {
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AttrBuilder B;
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B.addAttribute(Attribute::NoReturn);
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AL = AL.addAttributes(C, AttributeList::FunctionIndex, AttributeSet::get(C, B));
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EXPECT_TRUE(AL.hasFnAttribute(Attribute::NoReturn));
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EXPECT_TRUE(AL.hasFnAttr(Attribute::NoReturn));
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B.clear();
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B.addAttribute(Attribute::SExt);
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AL = AL.addAttributes(C, AttributeList::ReturnIndex, B);
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EXPECT_TRUE(AL.hasAttribute(AttributeList::ReturnIndex, Attribute::SExt));
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EXPECT_TRUE(AL.hasFnAttribute(Attribute::NoReturn));
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EXPECT_TRUE(AL.hasFnAttr(Attribute::NoReturn));
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}
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TEST(Attributes, RemoveAlign) {
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