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AMDGPU/SI: Fix a bug in SIFoldOperands 

Summary: ret.ll will contain a test for this

Reviewers: tstellarAMD, arsenm

Subscribers: arsenm

Differential Revision: http://reviews.llvm.org/D16029

llvm-svn: 257590
This commit is contained in:
Marek Olsak 2016-01-13 11:44:29 +00:00
parent 1ce2c9973f
commit 926c56f50c
1 changed files with 11 additions and 0 deletions
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11
llvm/lib/Target/AMDGPU/SIFoldOperands.cpp
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@ -338,6 +338,17 @@ bool SIFoldOperands::runOnMachineFunction(MachineFunction &MF) {
!TargetRegisterInfo::isVirtualRegister(OpToFold.getReg()))
continue;
// Prevent folding operands backwards in the function. For example,
// the COPY opcode must not be replaced by 1 in this example:
//
// %vreg3<def> = COPY %VGPR0; VGPR_32:%vreg3
// ...
// %VGPR0<def> = V_MOV_B32_e32 1, %EXEC<imp-use>
MachineOperand &Dst = MI.getOperand(0);
if (Dst.isReg() &&
!TargetRegisterInfo::isVirtualRegister(Dst.getReg()))
continue;
// We need mutate the operands of new mov instructions to add implicit
// uses of EXEC, but adding them invalidates the use_iterator, so defer
// this.