forked from OSchip/llvm-project
Speculatively revert "IRgen: Move EmitStoreThroughBitfieldLValue to use new CGBitfieldInfo::AccessInfo decomposition, instead of computing the access policy itself.", I think it might be breaking bootstrap.
llvm-svn: 101235
This commit is contained in:
Daniel Dunbar
parent
80ee5e299c
commit
91ea6ac3e9
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@ -600,6 +600,21 @@ RValue CodeGenFunction::EmitLoadOfLValue(LValue LV, QualType ExprType) {
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return EmitLoadOfKVCRefLValue(LV, ExprType);
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}
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static llvm::Value *getBitFieldAddr(LValue LV, CGBuilderTy &Builder) {
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const CGBitFieldInfo &Info = LV.getBitFieldInfo();
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llvm::Value *BaseValue = LV.getBitFieldBaseAddr();
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const llvm::PointerType *BaseTy =
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cast<llvm::PointerType>(BaseValue->getType());
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// Cast to the type of the access we will perform.
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llvm::Value *V = Builder.CreateBitCast(
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BaseValue, llvm::PointerType::get(Info.FieldTy, BaseTy->getAddressSpace()));
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// Offset by the access index.
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return Builder.CreateConstGEP1_32(V, Info.FieldNo);
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}
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RValue CodeGenFunction::EmitLoadOfBitfieldLValue(LValue LV,
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QualType ExprType) {
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const CGBitFieldInfo &Info = LV.getBitFieldInfo();
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@ -641,7 +656,7 @@ RValue CodeGenFunction::EmitLoadOfBitfieldLValue(LValue LV,
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// Shift out unused low bits and mask out unused high bits.
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llvm::Value *Val = Load;
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if (AI.FieldBitStart)
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Val = Builder.CreateLShr(Load, AI.FieldBitStart);
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Val = Builder.CreateAShr(Load, AI.FieldBitStart);
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Val = Builder.CreateAnd(Val, llvm::APInt::getLowBitsSet(AI.AccessWidth,
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AI.TargetBitWidth),
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"bf.clear");
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@ -663,7 +678,7 @@ RValue CodeGenFunction::EmitLoadOfBitfieldLValue(LValue LV,
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// FIXME: This can easily be folded into the load of the high bits, which
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// could also eliminate the mask of high bits in some situations.
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if (Info.isSigned()) {
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unsigned ExtraBits = ResSizeInBits - Info.getSize();
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unsigned ExtraBits = ResSizeInBits - Info.Size;
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if (ExtraBits)
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Res = Builder.CreateAShr(Builder.CreateShl(Res, ExtraBits),
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ExtraBits, "bf.val.sext");
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@ -790,97 +805,88 @@ void CodeGenFunction::EmitStoreThroughBitfieldLValue(RValue Src, LValue Dst,
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QualType Ty,
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llvm::Value **Result) {
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const CGBitFieldInfo &Info = Dst.getBitFieldInfo();
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unsigned StartBit = Info.Start;
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unsigned BitfieldSize = Info.Size;
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llvm::Value *Ptr = getBitFieldAddr(Dst, Builder);
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// Get the output type.
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const llvm::Type *ResLTy = ConvertType(Ty);
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unsigned ResSizeInBits = CGM.getTargetData().getTypeSizeInBits(ResLTy);
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const llvm::Type *EltTy =
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cast<llvm::PointerType>(Ptr->getType())->getElementType();
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unsigned EltTySize = CGM.getTargetData().getTypeSizeInBits(EltTy);
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// Get the source value, truncated to the width of the bit-field.
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// Get the new value, cast to the appropriate type and masked to exactly the
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// size of the bit-field.
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llvm::Value *SrcVal = Src.getScalarVal();
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SrcVal = Builder.CreateAnd(SrcVal, llvm::APInt::getLowBitsSet(ResSizeInBits,
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Info.getSize()),
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"bf.value");
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llvm::Value *NewVal = Builder.CreateIntCast(SrcVal, EltTy, false, "tmp");
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llvm::Constant *Mask = llvm::ConstantInt::get(VMContext,
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llvm::APInt::getLowBitsSet(EltTySize, BitfieldSize));
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NewVal = Builder.CreateAnd(NewVal, Mask, "bf.value");
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// Return the new value of the bit-field, if requested.
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if (Result) {
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// Cast back to the proper type for result.
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const llvm::Type *SrcTy = Src.getScalarVal()->getType();
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llvm::Value *ReloadVal = Builder.CreateIntCast(SrcVal, SrcTy, false,
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"bf.reload.val");
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const llvm::Type *SrcTy = SrcVal->getType();
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llvm::Value *SrcTrunc = Builder.CreateIntCast(NewVal, SrcTy, false,
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"bf.reload.val");
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// Sign extend if necessary.
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if (Info.isSigned()) {
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unsigned ExtraBits = ResSizeInBits - Info.getSize();
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if (ExtraBits)
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ReloadVal = Builder.CreateAShr(Builder.CreateShl(ReloadVal, ExtraBits),
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ExtraBits, "bf.reload.sext");
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if (Info.IsSigned) {
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unsigned SrcTySize = CGM.getTargetData().getTypeSizeInBits(SrcTy);
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llvm::Value *ExtraBits = llvm::ConstantInt::get(SrcTy,
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SrcTySize - BitfieldSize);
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SrcTrunc = Builder.CreateAShr(Builder.CreateShl(SrcTrunc, ExtraBits),
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ExtraBits, "bf.reload.sext");
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}
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*Result = ReloadVal;
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*Result = SrcTrunc;
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}
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// Iterate over the components, writing each piece to memory.
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for (unsigned i = 0, e = Info.getNumComponents(); i != e; ++i) {
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const CGBitFieldInfo::AccessInfo &AI = Info.getComponent(i);
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// In some cases the bitfield may straddle two memory locations. Emit the low
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// part first and check to see if the high needs to be done.
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unsigned LowBits = std::min(BitfieldSize, EltTySize - StartBit);
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llvm::Value *LowVal = Builder.CreateLoad(Ptr, Dst.isVolatileQualified(),
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"bf.prev.low");
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// Get the field pointer.
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llvm::Value *Ptr = Dst.getBitFieldBaseAddr();
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// Compute the mask for zero-ing the low part of this bitfield.
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llvm::Constant *InvMask =
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llvm::ConstantInt::get(VMContext,
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~llvm::APInt::getBitsSet(EltTySize, StartBit, StartBit + LowBits));
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// Only offset by the field index if used, so that incoming values are not
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// required to be structures.
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if (AI.FieldIndex)
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Ptr = Builder.CreateStructGEP(Ptr, AI.FieldIndex, "bf.field");
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// Compute the new low part as
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// LowVal = (LowVal & InvMask) | (NewVal << StartBit),
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// with the shift of NewVal implicitly stripping the high bits.
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llvm::Value *NewLowVal =
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Builder.CreateShl(NewVal, StartBit, "bf.value.lo");
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LowVal = Builder.CreateAnd(LowVal, InvMask, "bf.prev.lo.cleared");
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LowVal = Builder.CreateOr(LowVal, NewLowVal, "bf.new.lo");
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// Offset by the byte offset, if used.
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if (AI.FieldByteOffset) {
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const llvm::Type *i8PTy = llvm::Type::getInt8PtrTy(VMContext);
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Ptr = Builder.CreateBitCast(Ptr, i8PTy);
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Ptr = Builder.CreateConstGEP1_32(Ptr, AI.FieldByteOffset,"bf.field.offs");
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}
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// Write back.
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Builder.CreateStore(LowVal, Ptr, Dst.isVolatileQualified());
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// Cast to the access type.
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const llvm::Type *PTy = llvm::Type::getIntNPtrTy(VMContext, AI.AccessWidth,
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Ty.getAddressSpace());
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Ptr = Builder.CreateBitCast(Ptr, PTy);
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// If the low part doesn't cover the bitfield emit a high part.
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if (LowBits < BitfieldSize) {
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unsigned HighBits = BitfieldSize - LowBits;
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llvm::Value *HighPtr = Builder.CreateGEP(Ptr, llvm::ConstantInt::get(
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llvm::Type::getInt32Ty(VMContext), 1), "bf.ptr.hi");
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llvm::Value *HighVal = Builder.CreateLoad(HighPtr,
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Dst.isVolatileQualified(),
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"bf.prev.hi");
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// Extract the piece of the bit-field value to write in this access, shifted
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// and masked for placement into memory.
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llvm::Value *Val = SrcVal;
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if (AI.TargetBitOffset)
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Val = Builder.CreateLShr(Val, AI.TargetBitOffset);
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Val = Builder.CreateAnd(Val, llvm::APInt::getLowBitsSet(ResSizeInBits,
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AI.TargetBitWidth));
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if (AI.FieldBitStart)
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Val = Builder.CreateShl(Val, AI.FieldBitStart);
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// Compute the mask for zero-ing the high part of this bitfield.
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llvm::Constant *InvMask =
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llvm::ConstantInt::get(VMContext, ~llvm::APInt::getLowBitsSet(EltTySize,
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HighBits));
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// Extend or truncate to the access size.
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const llvm::Type *AccessLTy =
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llvm::Type::getIntNTy(VMContext, AI.AccessWidth);
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if (ResSizeInBits < AI.AccessWidth)
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Val = Builder.CreateZExt(Val, AccessLTy);
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else if (ResSizeInBits > AI.AccessWidth)
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Val = Builder.CreateTrunc(Val, AccessLTy);
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// Compute the new high part as
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// HighVal = (HighVal & InvMask) | (NewVal lshr LowBits),
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// where the high bits of NewVal have already been cleared and the
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// shift stripping the low bits.
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llvm::Value *NewHighVal =
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Builder.CreateLShr(NewVal, LowBits, "bf.value.high");
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HighVal = Builder.CreateAnd(HighVal, InvMask, "bf.prev.hi.cleared");
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HighVal = Builder.CreateOr(HighVal, NewHighVal, "bf.new.hi");
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// If necessary, load and OR in bits that are outside of the bit-field.
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if (AI.TargetBitWidth != AI.AccessWidth) {
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llvm::LoadInst *Load = Builder.CreateLoad(Ptr, Dst.isVolatileQualified());
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if (AI.AccessAlignment)
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Load->setAlignment(AI.AccessAlignment);
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// Compute the mask for zeroing the bits that are part of the bit-field.
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llvm::APInt InvMask =
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~llvm::APInt::getBitsSet(AI.AccessWidth, AI.FieldBitStart,
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AI.FieldBitStart + AI.TargetBitWidth);
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// Apply the mask and OR in to the value to write.
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Val = Builder.CreateOr(Val, Builder.CreateAnd(Load, InvMask));
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}
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// Write the value.
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llvm::StoreInst *Store = Builder.CreateStore(Val, Ptr,
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Dst.isVolatileQualified());
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if (AI.AccessAlignment)
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Store->setAlignment(AI.AccessAlignment);
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// Write back.
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Builder.CreateStore(HighVal, HighPtr, Dst.isVolatileQualified());
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}
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}
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@ -1,176 +0,0 @@
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// RUN: %clang_cc1 -emit-llvm -triple x86_64 -O3 -o - %s | \
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// RUN: FileCheck -check-prefix=CHECK-OPT %s
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/****/
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// PR6176
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struct __attribute((packed)) s0 {
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int f0 : 24;
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};
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struct s0 g0 = { 0xdeadbeef };
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int f0_load(struct s0 *a0) {
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int size_check[sizeof(struct s0) == 3 ? 1 : -1];
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return a0->f0;
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}
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int f0_store(struct s0 *a0) {
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return (a0->f0 = 1);
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}
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int f0_reload(struct s0 *a0) {
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return (a0->f0 += 1);
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}
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// CHECK-OPT: define i64 @test_0()
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// CHECK-OPT: ret i64 1
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// CHECK-OPT: }
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unsigned long long test_0() {
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struct s0 g0 = { 0xdeadbeef };
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unsigned long long res = 0;
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res ^= g0.f0;
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res ^= f0_load(&g0) ^ f0_store(&g0) ^ f0_reload(&g0);
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res ^= g0.f0;
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return res;
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}
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/****/
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// PR5591
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#pragma pack(push)
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#pragma pack(1)
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struct __attribute((packed)) s1 {
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signed f0 : 10;
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signed f1 : 10;
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};
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#pragma pack(pop)
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struct s1 g1 = { 0xdeadbeef, 0xdeadbeef };
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int f1_load(struct s1 *a0) {
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int size_check[sizeof(struct s1) == 3 ? 1 : -1];
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return a0->f1;
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}
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int f1_store(struct s1 *a0) {
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return (a0->f1 = 1234);
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}
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int f1_reload(struct s1 *a0) {
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return (a0->f1 += 1234);
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}
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// CHECK-OPT: define i64 @test_1()
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// CHECK-OPT: ret i64 210
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// CHECK-OPT: }
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unsigned long long test_1() {
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struct s1 g1 = { 0xdeadbeef, 0xdeadbeef };
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unsigned long long res = 0;
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res ^= g1.f0 ^ g1.f1;
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res ^= f1_load(&g1) ^ f1_store(&g1) ^ f1_reload(&g1);
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res ^= g1.f0 ^ g1.f1;
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return res;
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}
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/****/
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// PR5567
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union u2 {
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unsigned long long f0 : 3;
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};
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union u2 g2 = { 0xdeadbeef };
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int f2_load(union u2 *a0) {
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return a0->f0;
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}
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int f2_store(union u2 *a0) {
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return (a0->f0 = 1234);
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}
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int f2_reload(union u2 *a0) {
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return (a0->f0 += 1234);
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}
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// CHECK-OPT: define i64 @test_2()
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// CHECK-OPT: ret i64 2
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// CHECK-OPT: }
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unsigned long long test_2() {
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union u2 g2 = { 0xdeadbeef };
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unsigned long long res = 0;
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res ^= g2.f0;
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res ^= f2_load(&g2) ^ f2_store(&g2) ^ f2_reload(&g2);
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res ^= g2.f0;
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return res;
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}
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/***/
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// PR5039
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struct s3 {
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long long f0 : 32;
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long long f1 : 32;
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};
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struct s3 g3 = { 0xdeadbeef, 0xdeadbeef };
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int f3_load(struct s3 *a0) {
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a0->f0 = 1;
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return a0->f0;
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}
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int f3_store(struct s3 *a0) {
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a0->f0 = 1;
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return (a0->f0 = 1234);
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}
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int f3_reload(struct s3 *a0) {
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a0->f0 = 1;
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return (a0->f0 += 1234);
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}
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// CHECK-OPT: define i64 @test_3()
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// CHECK-OPT: ret i64 -559039940
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// CHECK-OPT: }
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unsigned long long test_3() {
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struct s3 g3 = { 0xdeadbeef, 0xdeadbeef };
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unsigned long long res = 0;
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res ^= g3.f0 ^ g3.f1;
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res ^= f3_load(&g3) ^ f3_store(&g3) ^ f3_reload(&g3);
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res ^= g3.f0 ^ g3.f1;
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return res;
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}
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/***/
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// This is a case where the bitfield access will straddle an alignment boundary
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// of its underlying type.
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struct s4 {
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unsigned f0 : 16;
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unsigned f1 : 28 __attribute__ ((packed));
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};
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struct s4 g4 = { 0xdeadbeef, 0xdeadbeef };
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int f4_load(struct s4 *a0) {
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return a0->f0 ^ a0->f1;
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}
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int f4_store(struct s4 *a0) {
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return (a0->f0 = 1234) ^ (a0->f1 = 5678);
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}
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int f4_reload(struct s4 *a0) {
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return (a0->f0 += 1234) ^ (a0->f1 += 5678);
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}
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// CHECK-OPT: define i64 @test_4()
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// CHECK-OPT: ret i64 4860
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// CHECK-OPT: }
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unsigned long long test_4() {
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struct s4 g4 = { 0xdeadbeef, 0xdeadbeef };
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unsigned long long res = 0;
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res ^= g4.f0 ^ g4.f1;
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res ^= f4_load(&g4) ^ f4_store(&g4) ^ f4_reload(&g4);
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res ^= g4.f0 ^ g4.f1;
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return res;
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}
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/***/
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