forked from OSchip/llvm-project
[InstCombine][SSE] Add MOVMSK constant folding (PR27982)
This patch adds support for folding undef/zero/constant inputs to MOVMSK instructions. The SSE/AVX versions can be fully folded, but the MMX version can only handle undef inputs. Differential Revision: http://reviews.llvm.org/D20998 llvm-svn: 271990
This commit is contained in:
Simon Pilgrim
parent
e64cee81bf
commit
91e3ac8293
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@ -325,6 +325,45 @@ static Value *simplifyX86immShift(const IntrinsicInst &II,
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return Builder.CreateAShr(Vec, ShiftVec);
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}
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static Value *simplifyX86movmsk(const IntrinsicInst &II,
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InstCombiner::BuilderTy &Builder) {
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Value *Arg = II.getArgOperand(0);
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Type *ResTy = II.getType();
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Type *ArgTy = Arg->getType();
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// movmsk(undef) -> zero as we must ensure the upper bits are zero.
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if (isa<UndefValue>(Arg))
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return Constant::getNullValue(ResTy);
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// We can't easily peek through x86_mmx types.
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if (!ArgTy->isVectorTy())
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return nullptr;
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auto *C = dyn_cast<Constant>(Arg);
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if (!C)
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return nullptr;
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// Extract signbits of the vector input and pack into integer result.
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APInt Result(ResTy->getPrimitiveSizeInBits(), 0);
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for (unsigned I = 0, E = ArgTy->getVectorNumElements(); I != E; ++I) {
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auto *COp = C->getAggregateElement(I);
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if (!COp)
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return nullptr;
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if (isa<UndefValue>(COp))
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continue;
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auto *CInt = dyn_cast<ConstantInt>(COp);
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auto *CFp = dyn_cast<ConstantFP>(COp);
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if (!CInt && !CFp)
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return nullptr;
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if ((CInt && CInt->isNegative()) || (CFp && CFp->isNegative()))
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Result.setBit(I);
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}
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return Constant::getIntegerValue(ResTy, Result);
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}
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static Value *simplifyX86insertps(const IntrinsicInst &II,
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InstCombiner::BuilderTy &Builder) {
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auto *CInt = dyn_cast<ConstantInt>(II.getArgOperand(2));
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@ -1460,6 +1499,18 @@ Instruction *InstCombiner::visitCallInst(CallInst &CI) {
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break;
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}
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case Intrinsic::x86_mmx_pmovmskb:
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case Intrinsic::x86_sse_movmsk_ps:
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case Intrinsic::x86_sse2_movmsk_pd:
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case Intrinsic::x86_sse2_pmovmskb_128:
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case Intrinsic::x86_avx_movmsk_pd_256:
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case Intrinsic::x86_avx_movmsk_ps_256:
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case Intrinsic::x86_avx2_pmovmskb: {
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if (Value *V = simplifyX86movmsk(*II, *Builder))
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return replaceInstUsesWith(*II, V);
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break;
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}
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case Intrinsic::x86_sse_comieq_ss:
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case Intrinsic::x86_sse_comige_ss:
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case Intrinsic::x86_sse_comigt_ss:
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@ -129,6 +129,190 @@ define i32 @test_lower_x86_avx_movmsk_pd_256(<4 x double> %a0) {
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; llvm.x86.avx2.pmovmskb uses the whole of the 32-bit register.
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;
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; Constant Folding (UNDEF -> ZERO)
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;
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define i32 @undef_x86_mmx_pmovmskb() {
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; CHECK-LABEL: @undef_x86_mmx_pmovmskb(
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; CHECK-NEXT: ret i32 0
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;
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%1 = call i32 @llvm.x86.mmx.pmovmskb(x86_mmx undef)
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ret i32 %1
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}
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define i32 @undef_x86_sse_movmsk_ps() {
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; CHECK-LABEL: @undef_x86_sse_movmsk_ps(
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; CHECK-NEXT: ret i32 0
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;
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%1 = call i32 @llvm.x86.sse.movmsk.ps(<4 x float> undef)
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ret i32 %1
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}
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define i32 @undef_x86_sse2_movmsk_pd() {
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; CHECK-LABEL: @undef_x86_sse2_movmsk_pd(
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; CHECK-NEXT: ret i32 0
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;
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%1 = call i32 @llvm.x86.sse2.movmsk.pd(<2 x double> undef)
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ret i32 %1
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}
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define i32 @undef_x86_sse2_pmovmskb_128() {
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; CHECK-LABEL: @undef_x86_sse2_pmovmskb_128(
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; CHECK-NEXT: ret i32 0
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;
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%1 = call i32 @llvm.x86.sse2.pmovmskb.128(<16 x i8> undef)
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ret i32 %1
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}
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define i32 @undef_x86_avx_movmsk_ps_256() {
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; CHECK-LABEL: @undef_x86_avx_movmsk_ps_256(
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; CHECK-NEXT: ret i32 0
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;
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%1 = call i32 @llvm.x86.avx.movmsk.ps.256(<8 x float> undef)
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ret i32 %1
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}
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define i32 @undef_x86_avx_movmsk_pd_256() {
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; CHECK-LABEL: @undef_x86_avx_movmsk_pd_256(
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; CHECK-NEXT: ret i32 0
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;
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%1 = call i32 @llvm.x86.avx.movmsk.pd.256(<4 x double> undef)
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ret i32 %1
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}
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define i32 @undef_x86_avx2_pmovmskb() {
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; CHECK-LABEL: @undef_x86_avx2_pmovmskb(
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; CHECK-NEXT: ret i32 0
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;
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%1 = call i32 @llvm.x86.avx2.pmovmskb(<32 x i8> undef)
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ret i32 %1
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}
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;
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; Constant Folding (ZERO -> ZERO)
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;
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define i32 @zero_x86_mmx_pmovmskb() {
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; CHECK-LABEL: @zero_x86_mmx_pmovmskb(
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; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.x86.mmx.pmovmskb(x86_mmx bitcast (<1 x i64> zeroinitializer to x86_mmx))
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; CHECK-NEXT: ret i32 [[TMP1]]
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;
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%1 = bitcast <1 x i64> zeroinitializer to x86_mmx
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%2 = call i32 @llvm.x86.mmx.pmovmskb(x86_mmx %1)
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ret i32 %2
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}
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define i32 @zero_x86_sse_movmsk_ps() {
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; CHECK-LABEL: @zero_x86_sse_movmsk_ps(
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; CHECK-NEXT: ret i32 0
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;
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%1 = call i32 @llvm.x86.sse.movmsk.ps(<4 x float> zeroinitializer)
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ret i32 %1
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}
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define i32 @zero_x86_sse2_movmsk_pd() {
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; CHECK-LABEL: @zero_x86_sse2_movmsk_pd(
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; CHECK-NEXT: ret i32 0
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;
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%1 = call i32 @llvm.x86.sse2.movmsk.pd(<2 x double> zeroinitializer)
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ret i32 %1
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}
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define i32 @zero_x86_sse2_pmovmskb_128() {
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; CHECK-LABEL: @zero_x86_sse2_pmovmskb_128(
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; CHECK-NEXT: ret i32 0
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;
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%1 = call i32 @llvm.x86.sse2.pmovmskb.128(<16 x i8> zeroinitializer)
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ret i32 %1
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}
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define i32 @zero_x86_avx_movmsk_ps_256() {
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; CHECK-LABEL: @zero_x86_avx_movmsk_ps_256(
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; CHECK-NEXT: ret i32 0
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;
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%1 = call i32 @llvm.x86.avx.movmsk.ps.256(<8 x float> zeroinitializer)
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ret i32 %1
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}
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define i32 @zero_x86_avx_movmsk_pd_256() {
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; CHECK-LABEL: @zero_x86_avx_movmsk_pd_256(
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; CHECK-NEXT: ret i32 0
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;
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%1 = call i32 @llvm.x86.avx.movmsk.pd.256(<4 x double> zeroinitializer)
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ret i32 %1
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}
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define i32 @zero_x86_avx2_pmovmskb() {
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; CHECK-LABEL: @zero_x86_avx2_pmovmskb(
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; CHECK-NEXT: ret i32 0
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;
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%1 = call i32 @llvm.x86.avx2.pmovmskb(<32 x i8> zeroinitializer)
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ret i32 %1
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}
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;
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; Constant Folding
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;
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define i32 @fold_x86_mmx_pmovmskb() {
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; CHECK-LABEL: @fold_x86_mmx_pmovmskb(
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; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.x86.mmx.pmovmskb(x86_mmx bitcast (<8 x i8> <i8 0, i8 -1, i8 -1, i8 127, i8 -127, i8 63, i8 64, i8 0> to x86_mmx))
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; CHECK-NEXT: ret i32 [[TMP1]]
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;
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%1 = bitcast <8 x i8> <i8 0, i8 255, i8 -1, i8 127, i8 -127, i8 63, i8 64, i8 256> to x86_mmx
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%2 = call i32 @llvm.x86.mmx.pmovmskb(x86_mmx %1)
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ret i32 %2
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}
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define i32 @fold_x86_sse_movmsk_ps() {
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; CHECK-LABEL: @fold_x86_sse_movmsk_ps(
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; CHECK-NEXT: ret i32 10
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;
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%1 = call i32 @llvm.x86.sse.movmsk.ps(<4 x float> <float 1.0, float -1.0, float 100.0, float -200.0>)
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ret i32 %1
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}
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define i32 @fold_x86_sse2_movmsk_pd() {
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; CHECK-LABEL: @fold_x86_sse2_movmsk_pd(
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; CHECK-NEXT: ret i32 2
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;
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%1 = call i32 @llvm.x86.sse2.movmsk.pd(<2 x double> <double 1.0, double -1.0>)
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ret i32 %1
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}
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define i32 @fold_x86_sse2_pmovmskb_128() {
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; CHECK-LABEL: @fold_x86_sse2_pmovmskb_128(
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; CHECK-NEXT: ret i32 5654
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;
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%1 = call i32 @llvm.x86.sse2.pmovmskb.128(<16 x i8> <i8 0, i8 255, i8 -1, i8 127, i8 -127, i8 63, i8 64, i8 256, i8 0, i8 255, i8 -1, i8 127, i8 -127, i8 63, i8 64, i8 256>)
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ret i32 %1
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}
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define i32 @fold_x86_avx_movmsk_ps_256() {
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; CHECK-LABEL: @fold_x86_avx_movmsk_ps_256(
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; CHECK-NEXT: ret i32 170
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;
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%1 = call i32 @llvm.x86.avx.movmsk.ps.256(<8 x float> <float 1.0, float -1.0, float 100.0, float -200.0, float +0.0, float -0.0, float 100000.0, float -5000000.0>)
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ret i32 %1
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}
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define i32 @fold_x86_avx_movmsk_pd_256() {
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; CHECK-LABEL: @fold_x86_avx_movmsk_pd_256(
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; CHECK-NEXT: ret i32 10
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;
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%1 = call i32 @llvm.x86.avx.movmsk.pd.256(<4 x double> <double 1.0, double -1.0, double 100.0, double -200.0>)
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ret i32 %1
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}
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define i32 @fold_x86_avx2_pmovmskb() {
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; CHECK-LABEL: @fold_x86_avx2_pmovmskb(
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; CHECK-NEXT: ret i32 370546176
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;
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%1 = call i32 @llvm.x86.avx2.pmovmskb(<32 x i8> <i8 0, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 0, i8 255, i8 -1, i8 127, i8 -127, i8 63, i8 64, i8 256, i8 0, i8 255, i8 -1, i8 127, i8 -127, i8 63, i8 64, i8 256, i8 0, i8 255, i8 -1, i8 127, i8 -127, i8 63, i8 64, i8 256>)
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ret i32 %1
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}
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declare i32 @llvm.x86.mmx.pmovmskb(x86_mmx)
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declare i32 @llvm.x86.sse.movmsk.ps(<4 x float>)
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