forked from OSchip/llvm-project
parent
1239d2d7ff
commit
91ae129b90
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@ -443,10 +443,12 @@ X86TargetLowering::LowerCCCCallTo(SDOperand Chain, const Type *RetTy,
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}
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}
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std::pair<SDOperand,SDOperand>
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std::pair<SDOperand,SDOperand>
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X86TargetLowering::LowerVAStart(SDOperand Chain, SelectionDAG &DAG, SDOperand Dest) {
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X86TargetLowering::LowerVAStart(SDOperand Chain, SelectionDAG &DAG,
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SDOperand Dest) {
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// vastart just stores the address of the VarArgsFrameIndex slot.
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// vastart just stores the address of the VarArgsFrameIndex slot.
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SDOperand FR = DAG.getFrameIndex(VarArgsFrameIndex, MVT::i32);
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SDOperand FR = DAG.getFrameIndex(VarArgsFrameIndex, MVT::i32);
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SDOperand Result = DAG.getNode(ISD::STORE, MVT::Other, Chain, FR, Dest, DAG.getSrcValue(NULL));
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SDOperand Result = DAG.getNode(ISD::STORE, MVT::Other, Chain, FR, Dest,
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DAG.getSrcValue(NULL));
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return std::make_pair(Result, Result);
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return std::make_pair(Result, Result);
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}
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}
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@ -455,7 +457,8 @@ X86TargetLowering::LowerVAArgNext(SDOperand Chain, SDOperand VAList,
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const Type *ArgTy, SelectionDAG &DAG) {
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const Type *ArgTy, SelectionDAG &DAG) {
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MVT::ValueType ArgVT = getValueType(ArgTy);
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MVT::ValueType ArgVT = getValueType(ArgTy);
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SDOperand Val = DAG.getLoad(MVT::i32, Chain, VAList, DAG.getSrcValue(NULL));
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SDOperand Val = DAG.getLoad(MVT::i32, Chain, VAList, DAG.getSrcValue(NULL));
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SDOperand Result = DAG.getLoad(ArgVT, Val.getValue(1), Val, DAG.getSrcValue(NULL));
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SDOperand Result = DAG.getLoad(ArgVT, Val.getValue(1), Val,
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DAG.getSrcValue(NULL));
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unsigned Amt;
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unsigned Amt;
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if (ArgVT == MVT::i32)
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if (ArgVT == MVT::i32)
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Amt = 4;
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Amt = 4;
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