forked from OSchip/llvm-project
AMDGPU: Unify LowerGlobalAddress
Reviewers: tstellard Subscribers: arsenm Differential Revision: http://reviews.llvm.org/D19794 llvm-svn: 269481
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@ -787,6 +787,11 @@ SDValue AMDGPUTargetLowering::LowerGlobalAddress(AMDGPUMachineFunction* MFI,
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const GlobalValue *GV = G->getGlobal();
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switch (G->getAddressSpace()) {
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case AMDGPUAS::CONSTANT_ADDRESS: {
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MVT ConstPtrVT = getPointerTy(DL, AMDGPUAS::CONSTANT_ADDRESS);
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SDValue GA = DAG.getTargetGlobalAddress(GV, SDLoc(G), ConstPtrVT);
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return DAG.getNode(AMDGPUISD::CONST_DATA_PTR, SDLoc(G), ConstPtrVT, GA);
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}
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case AMDGPUAS::LOCAL_ADDRESS: {
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// XXX: What does the value of G->getOffset() mean?
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assert(G->getOffset() == 0 &&
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@ -1494,22 +1494,6 @@ SDValue SITargetLowering::lowerADDRSPACECAST(SDValue Op,
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return DAG.getUNDEF(ASC->getValueType(0));
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}
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SDValue SITargetLowering::LowerGlobalAddress(AMDGPUMachineFunction *MFI,
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SDValue Op,
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SelectionDAG &DAG) const {
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GlobalAddressSDNode *GSD = cast<GlobalAddressSDNode>(Op);
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if (GSD->getAddressSpace() != AMDGPUAS::CONSTANT_ADDRESS)
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return AMDGPUTargetLowering::LowerGlobalAddress(MFI, Op, DAG);
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SDLoc DL(GSD);
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const GlobalValue *GV = GSD->getGlobal();
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MVT PtrVT = getPointerTy(DAG.getDataLayout(), GSD->getAddressSpace());
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SDValue GA = DAG.getTargetGlobalAddress(GV, DL, MVT::i32);
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return DAG.getNode(AMDGPUISD::CONST_DATA_PTR, DL, PtrVT, GA);
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}
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SDValue SITargetLowering::copyToM0(SelectionDAG &DAG, SDValue Chain, SDLoc DL,
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SDValue V) const {
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// We can't use S_MOV_B32 directly, because there is no way to specify m0 as
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@ -23,8 +23,6 @@ namespace llvm {
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class SITargetLowering final : public AMDGPUTargetLowering {
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SDValue LowerParameter(SelectionDAG &DAG, EVT VT, EVT MemVT, SDLoc DL,
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SDValue Chain, unsigned Offset, bool Signed) const;
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SDValue LowerGlobalAddress(AMDGPUMachineFunction *MFI, SDValue Op,
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SelectionDAG &DAG) const override;
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SDValue lowerImplicitZextParam(SelectionDAG &DAG, SDValue Op,
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MVT VT, unsigned Offset) const;
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