forked from OSchip/llvm-project
parent
1220b31a31
commit
91944e8699
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@ -1600,7 +1600,7 @@ def PSLLWrr : PDIi8<0xF1, MRMSrcReg, (ops VR128:$dst, VR128:$src1, VR128:$src2),
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"psllw {$src2, $dst|$dst, $src2}",
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[(set VR128:$dst, (int_x86_sse2_psll_w VR128:$src1,
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VR128:$src2))]>;
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def PSLLWrm : PDIi8<0xF1, MRMSrcReg, (ops VR128:$dst, VR128:$src1, i128mem:$src2),
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def PSLLWrm : PDIi8<0xF1, MRMSrcMem, (ops VR128:$dst, VR128:$src1, i128mem:$src2),
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"psllw {$src2, $dst|$dst, $src2}",
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[(set VR128:$dst, (int_x86_sse2_psll_w VR128:$src1,
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(bc_v4i32 (loadv2i64 addr:$src2))))]>;
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@ -1612,7 +1612,7 @@ def PSLLDrr : PDIi8<0xF2, MRMSrcReg, (ops VR128:$dst, VR128:$src1, VR128:$src2),
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"pslld {$src2, $dst|$dst, $src2}",
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[(set VR128:$dst, (int_x86_sse2_psll_d VR128:$src1,
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VR128:$src2))]>;
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def PSLLDrm : PDIi8<0xF2, MRMSrcReg, (ops VR128:$dst, VR128:$src1, i128mem:$src2),
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def PSLLDrm : PDIi8<0xF2, MRMSrcMem, (ops VR128:$dst, VR128:$src1, i128mem:$src2),
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"pslld {$src2, $dst|$dst, $src2}",
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[(set VR128:$dst, (int_x86_sse2_psll_d VR128:$src1,
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(bc_v4i32 (loadv2i64 addr:$src2))))]>;
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@ -1624,7 +1624,7 @@ def PSLLQrr : PDIi8<0xF3, MRMSrcReg, (ops VR128:$dst, VR128:$src1, VR128:$src2),
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"psllq {$src2, $dst|$dst, $src2}",
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[(set VR128:$dst, (int_x86_sse2_psll_q VR128:$src1,
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VR128:$src2))]>;
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def PSLLQrm : PDIi8<0xF3, MRMSrcReg, (ops VR128:$dst, VR128:$src1, i128mem:$src2),
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def PSLLQrm : PDIi8<0xF3, MRMSrcMem, (ops VR128:$dst, VR128:$src1, i128mem:$src2),
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"psllq {$src2, $dst|$dst, $src2}",
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[(set VR128:$dst, (int_x86_sse2_psll_q VR128:$src1,
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(bc_v4i32 (loadv2i64 addr:$src2))))]>;
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@ -1639,7 +1639,7 @@ def PSRLWrr : PDIi8<0xD1, MRMSrcReg, (ops VR128:$dst, VR128:$src1, VR128:$src2),
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"psrlw {$src2, $dst|$dst, $src2}",
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[(set VR128:$dst, (int_x86_sse2_psrl_w VR128:$src1,
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VR128:$src2))]>;
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def PSRLWrm : PDIi8<0xD1, MRMSrcReg, (ops VR128:$dst, VR128:$src1, i128mem:$src2),
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def PSRLWrm : PDIi8<0xD1, MRMSrcMem, (ops VR128:$dst, VR128:$src1, i128mem:$src2),
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"psrlw {$src2, $dst|$dst, $src2}",
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[(set VR128:$dst, (int_x86_sse2_psrl_w VR128:$src1,
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(bc_v4i32 (loadv2i64 addr:$src2))))]>;
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@ -1651,7 +1651,7 @@ def PSRLDrr : PDIi8<0xD2, MRMSrcReg, (ops VR128:$dst, VR128:$src1, VR128:$src2),
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"psrld {$src2, $dst|$dst, $src2}",
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[(set VR128:$dst, (int_x86_sse2_psrl_d VR128:$src1,
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VR128:$src2))]>;
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def PSRLDrm : PDIi8<0xD2, MRMSrcReg, (ops VR128:$dst, VR128:$src1, i128mem:$src2),
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def PSRLDrm : PDIi8<0xD2, MRMSrcMem, (ops VR128:$dst, VR128:$src1, i128mem:$src2),
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"psrld {$src2, $dst|$dst, $src2}",
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[(set VR128:$dst, (int_x86_sse2_psrl_d VR128:$src1,
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(bc_v4i32 (loadv2i64 addr:$src2))))]>;
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@ -1663,7 +1663,7 @@ def PSRLQrr : PDIi8<0xD3, MRMSrcReg, (ops VR128:$dst, VR128:$src1, VR128:$src2),
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"psrlq {$src2, $dst|$dst, $src2}",
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[(set VR128:$dst, (int_x86_sse2_psrl_q VR128:$src1,
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VR128:$src2))]>;
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def PSRLQrm : PDIi8<0xD3, MRMSrcReg, (ops VR128:$dst, VR128:$src1, i128mem:$src2),
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def PSRLQrm : PDIi8<0xD3, MRMSrcMem, (ops VR128:$dst, VR128:$src1, i128mem:$src2),
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"psrlq {$src2, $dst|$dst, $src2}",
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[(set VR128:$dst, (int_x86_sse2_psrl_q VR128:$src1,
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(bc_v4i32 (loadv2i64 addr:$src2))))]>;
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@ -1678,7 +1678,7 @@ def PSRAWrr : PDIi8<0xE1, MRMSrcReg, (ops VR128:$dst, VR128:$src1, VR128:$src2),
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"psraw {$src2, $dst|$dst, $src2}",
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[(set VR128:$dst, (int_x86_sse2_psra_w VR128:$src1,
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VR128:$src2))]>;
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def PSRAWrm : PDIi8<0xE1, MRMSrcReg, (ops VR128:$dst, VR128:$src1, i128mem:$src2),
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def PSRAWrm : PDIi8<0xE1, MRMSrcMem, (ops VR128:$dst, VR128:$src1, i128mem:$src2),
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"psraw {$src2, $dst|$dst, $src2}",
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[(set VR128:$dst, (int_x86_sse2_psra_w VR128:$src1,
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(bc_v4i32 (loadv2i64 addr:$src2))))]>;
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@ -1690,7 +1690,7 @@ def PSRADrr : PDIi8<0xE2, MRMSrcReg, (ops VR128:$dst, VR128:$src1, VR128:$src2),
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"psrad {$src2, $dst|$dst, $src2}",
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[(set VR128:$dst, (int_x86_sse2_psra_d VR128:$src1,
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VR128:$src2))]>;
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def PSRADrm : PDIi8<0xE2, MRMSrcReg, (ops VR128:$dst, VR128:$src1, i128mem:$src2),
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def PSRADrm : PDIi8<0xE2, MRMSrcMem, (ops VR128:$dst, VR128:$src1, i128mem:$src2),
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"psrad {$src2, $dst|$dst, $src2}",
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[(set VR128:$dst, (int_x86_sse2_psra_d VR128:$src1,
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(bc_v4i32 (loadv2i64 addr:$src2))))]>;
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