forked from OSchip/llvm-project
Revert rr340111 "[GISel]: Add Legalization/lowering code for bit counting operations"
It causes LegalizerHelperTest.LowerBitCountingCTTZ1 to fail. llvm-svn: 340186
This commit is contained in:
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531319388d
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918930adf9
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@ -49,7 +49,6 @@ public:
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};
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LegalizerHelper(MachineFunction &MF);
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LegalizerHelper(MachineFunction &MF, const LegalizerInfo &LI);
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/// Replace \p MI by a sequence of legal instructions that can implement the
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/// same operation. Note that this means \p MI may be deleted, so any iterator
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@ -113,8 +112,6 @@ private:
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void extractParts(unsigned Reg, LLT Ty, int NumParts,
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SmallVectorImpl<unsigned> &VRegs);
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LegalizeResult lowerBitCount(MachineInstr &MI, unsigned TypeIdx, LLT Ty);
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MachineRegisterInfo &MRI;
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const LegalizerInfo &LI;
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};
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@ -668,11 +668,6 @@ public:
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/// \return a MachineInstrBuilder for the newly created instruction.
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MachineInstrBuilder buildICmp(CmpInst::Predicate Pred,
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unsigned Res, unsigned Op0, unsigned Op1);
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template <typename DstTy, typename... UseArgsTy>
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MachineInstrBuilder buildICmp(CmpInst::Predicate Pred, DstTy &&Dst,
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UseArgsTy &&... UseArgs) {
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return buildICmp(Pred, getDestFromArg(Dst), getRegFromArg(UseArgs)...);
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}
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/// Build and insert a \p Res = G_FCMP \p Pred\p Op0, \p Op1
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///
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@ -701,10 +696,6 @@ public:
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/// \return a MachineInstrBuilder for the newly created instruction.
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MachineInstrBuilder buildSelect(unsigned Res, unsigned Tst,
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unsigned Op0, unsigned Op1);
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template <typename DstTy, typename... UseArgsTy>
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MachineInstrBuilder buildSelect(DstTy &&Dst, UseArgsTy &&... UseArgs) {
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return buildSelect(getDestFromArg(Dst), getRegFromArg(UseArgs)...);
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}
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/// Build and insert \p Res = G_INSERT_VECTOR_ELT \p Val,
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/// \p Elt, \p Idx
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@ -83,11 +83,6 @@ def : GINodeEquiv<G_INTRINSIC_W_SIDE_EFFECTS, intrinsic_void>;
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def : GINodeEquiv<G_INTRINSIC_W_SIDE_EFFECTS, intrinsic_w_chain>;
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def : GINodeEquiv<G_BR, br>;
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def : GINodeEquiv<G_BSWAP, bswap>;
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def : GINodeEquiv<G_CTLZ, ctlz>;
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def : GINodeEquiv<G_CTTZ, cttz>;
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def : GINodeEquiv<G_CTLZ_ZERO_UNDEF, ctlz_zero_undef>;
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def : GINodeEquiv<G_CTTZ_ZERO_UNDEF, cttz_zero_undef>;
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def : GINodeEquiv<G_CTPOP, ctpop>;
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// Broadly speaking G_LOAD is equivalent to ISD::LOAD but there are some
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// complications that tablegen must take care of. For example, Predicates such
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@ -17,13 +17,12 @@
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#include "llvm/CodeGen/GlobalISel/CallLowering.h"
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#include "llvm/CodeGen/GlobalISel/LegalizerInfo.h"
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#include "llvm/CodeGen/MachineRegisterInfo.h"
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#include "llvm/CodeGen/TargetInstrInfo.h"
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#include "llvm/CodeGen/TargetLowering.h"
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#include "llvm/CodeGen/TargetSubtargetInfo.h"
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#include "llvm/Support/Debug.h"
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#include "llvm/Support/MathExtras.h"
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#include "llvm/Support/raw_ostream.h"
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#define DEBUG_TYPE "legalizer"
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using namespace llvm;
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@ -34,10 +33,6 @@ LegalizerHelper::LegalizerHelper(MachineFunction &MF)
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MIRBuilder.setMF(MF);
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}
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LegalizerHelper::LegalizerHelper(MachineFunction &MF, const LegalizerInfo &LI)
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: MRI(MF.getRegInfo()), LI(LI) {
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MIRBuilder.setMF(MF);
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}
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LegalizerHelper::LegalizeResult
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LegalizerHelper::legalizeInstrStep(MachineInstr &MI) {
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LLVM_DEBUG(dbgs() << "Legalizing: "; MI.print(dbgs()));
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@ -989,12 +984,6 @@ LegalizerHelper::lower(MachineInstr &MI, unsigned TypeIdx, LLT Ty) {
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return UnableToLegalize;
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}
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case TargetOpcode::G_CTLZ_ZERO_UNDEF:
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case TargetOpcode::G_CTTZ_ZERO_UNDEF:
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case TargetOpcode::G_CTLZ:
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case TargetOpcode::G_CTTZ:
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case TargetOpcode::G_CTPOP:
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return lowerBitCount(MI, TypeIdx, Ty);
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}
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}
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@ -1035,112 +1024,3 @@ LegalizerHelper::fewerElementsVector(MachineInstr &MI, unsigned TypeIdx,
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}
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}
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}
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LegalizerHelper::LegalizeResult
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LegalizerHelper::lowerBitCount(MachineInstr &MI, unsigned TypeIdx, LLT Ty) {
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unsigned Opc = MI.getOpcode();
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auto &TII = *MI.getMF()->getSubtarget().getInstrInfo();
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auto isLegalOrCustom = [this](const LegalityQuery &Q) {
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auto QAction = LI.getAction(Q).Action;
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return QAction == Legal || QAction == Custom;
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};
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switch (Opc) {
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default:
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return UnableToLegalize;
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case TargetOpcode::G_CTLZ_ZERO_UNDEF: {
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// This trivially expands to CTLZ.
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MI.setDesc(TII.get(TargetOpcode::G_CTLZ));
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MIRBuilder.recordInsertion(&MI);
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return Legalized;
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}
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case TargetOpcode::G_CTLZ: {
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unsigned SrcReg = MI.getOperand(1).getReg();
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unsigned Len = Ty.getSizeInBits();
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if (isLegalOrCustom({TargetOpcode::G_CTLZ_ZERO_UNDEF, {Ty}})) {
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// If CTLZ_ZERO_UNDEF is legal or custom, emit that and a select with
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// zero.
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auto MIBCtlzZU =
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MIRBuilder.buildInstr(TargetOpcode::G_CTLZ_ZERO_UNDEF, Ty, SrcReg);
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auto MIBZero = MIRBuilder.buildConstant(Ty, 0);
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auto MIBLen = MIRBuilder.buildConstant(Ty, Len);
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auto MIBICmp = MIRBuilder.buildICmp(CmpInst::ICMP_EQ, LLT::scalar(1),
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SrcReg, MIBZero);
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MIRBuilder.buildSelect(MI.getOperand(0).getReg(), MIBICmp, MIBLen,
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MIBCtlzZU);
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MI.eraseFromParent();
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return Legalized;
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}
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// for now, we do this:
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// NewLen = NextPowerOf2(Len);
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// x = x | (x >> 1);
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// x = x | (x >> 2);
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// ...
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// x = x | (x >>16);
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// x = x | (x >>32); // for 64-bit input
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// Upto NewLen/2
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// return Len - popcount(x);
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//
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// Ref: "Hacker's Delight" by Henry Warren
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unsigned Op = SrcReg;
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unsigned NewLen = PowerOf2Ceil(Len);
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for (unsigned i = 0; (1U << i) <= (NewLen / 2); ++i) {
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auto MIBShiftAmt = MIRBuilder.buildConstant(Ty, 1ULL << i);
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auto MIBOp = MIRBuilder.buildInstr(
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TargetOpcode::G_OR, Ty, Op,
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MIRBuilder.buildInstr(TargetOpcode::G_LSHR, Ty, Op, MIBShiftAmt));
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Op = MIBOp->getOperand(0).getReg();
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}
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auto MIBPop = MIRBuilder.buildInstr(TargetOpcode::G_CTPOP, Ty, Op);
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MIRBuilder.buildInstr(TargetOpcode::G_SUB, MI.getOperand(0).getReg(),
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MIRBuilder.buildConstant(Ty, Len), MIBPop);
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MI.eraseFromParent();
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return Legalized;
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}
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case TargetOpcode::G_CTTZ_ZERO_UNDEF: {
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// This trivially expands to CTTZ.
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MI.setDesc(TII.get(TargetOpcode::G_CTTZ));
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MIRBuilder.recordInsertion(&MI);
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return Legalized;
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}
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case TargetOpcode::G_CTTZ: {
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unsigned SrcReg = MI.getOperand(1).getReg();
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unsigned Len = Ty.getSizeInBits();
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if (isLegalOrCustom({TargetOpcode::G_CTTZ_ZERO_UNDEF, {Ty}})) {
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// If CTTZ_ZERO_UNDEF is legal or custom, emit that and a select with
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// zero.
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auto MIBCttzZU =
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MIRBuilder.buildInstr(TargetOpcode::G_CTTZ_ZERO_UNDEF, Ty, SrcReg);
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auto MIBZero = MIRBuilder.buildConstant(Ty, 0);
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auto MIBLen = MIRBuilder.buildConstant(Ty, Len);
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auto MIBICmp = MIRBuilder.buildICmp(CmpInst::ICMP_EQ, LLT::scalar(1),
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SrcReg, MIBZero);
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MIRBuilder.buildSelect(MI.getOperand(0).getReg(), MIBICmp, MIBLen,
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MIBCttzZU);
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MI.eraseFromParent();
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return Legalized;
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}
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// for now, we use: { return popcount(~x & (x - 1)); }
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// unless the target has ctlz but not ctpop, in which case we use:
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// { return 32 - nlz(~x & (x-1)); }
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// Ref: "Hacker's Delight" by Henry Warren
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auto MIBCstNeg1 = MIRBuilder.buildConstant(Ty, -1);
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auto MIBNot =
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MIRBuilder.buildInstr(TargetOpcode::G_XOR, Ty, SrcReg, MIBCstNeg1);
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auto MIBTmp = MIRBuilder.buildInstr(
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TargetOpcode::G_AND, Ty, MIBNot,
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MIRBuilder.buildInstr(TargetOpcode::G_ADD, Ty, SrcReg, MIBCstNeg1));
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if (!isLegalOrCustom({TargetOpcode::G_CTPOP, {Ty}}) &&
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isLegalOrCustom({TargetOpcode::G_CTLZ, {Ty}})) {
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MIRBuilder.buildInstr(
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TargetOpcode::G_SUB, MI.getOperand(0).getReg(),
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MIRBuilder.buildConstant(Ty, Len),
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MIRBuilder.buildInstr(TargetOpcode::G_CTLZ, Ty, MIBTmp));
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MI.eraseFromParent();
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return Legalized;
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}
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MI.setDesc(TII.get(TargetOpcode::G_CTPOP));
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MI.getOperand(1).setReg(MIBTmp->getOperand(0).getReg());
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return Legalized;
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}
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}
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}
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@ -12,5 +12,4 @@ set(LLVM_LINK_COMPONENTS
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add_llvm_unittest(GlobalISelTests
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LegalizerInfoTest.cpp
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PatternMatchTest.cpp
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LegalizerHelperTest.cpp
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)
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@ -1,188 +0,0 @@
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//===- PatternMatchTest.cpp -----------------------------------------------===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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#include "LegalizerHelperTest.h"
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namespace {
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// Test CTTZ expansion when CTTZ_ZERO_UNDEF is legal or custom,
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// in which case it becomes CTTZ_ZERO_UNDEF with select.
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TEST_F(LegalizerHelperTest, LowerBitCountingCTTZ0) {
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if (!TM)
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return;
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// Declare your legalization info
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DefineLegalizerInfo(
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A, { getActionDefinitionsBuilder(G_CTTZ_ZERO_UNDEF).legalFor({s64}); });
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// Build Instr
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auto MIBCTTZ = B.buildInstr(TargetOpcode::G_CTTZ, LLT::scalar(64), Copies[0]);
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AInfo Info(MF->getSubtarget());
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LegalizerHelper Helper(*MF, Info);
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// Perform Legalization
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ASSERT_TRUE(Helper.lower(*MIBCTTZ, 0, LLT::scalar(64)) ==
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LegalizerHelper::LegalizeResult::Legalized);
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auto CheckStr = R"(
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CHECK: [[CZU:%[0-9]+]]:_(s64) = G_CTTZ_ZERO_UNDEF %0
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CHECK: [[ZERO:%[0-9]+]]:_(s64) = G_CONSTANT i64 0
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CHECK: [[SIXTY4:%[0-9]+]]:_(s64) = G_CONSTANT i64 64
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CHECK: [[CMP:%[0-9]+]]:_(s1) = G_ICMP intpred(eq), %0:_(s64), [[ZERO]]
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CHECK: [[SEL:%[0-9]+]]:_(s64) = G_SELECT [[CMP]]:_(s1), [[SIXTY4]]:_, [[CZU]]
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)";
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// Check
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ASSERT_TRUE(CheckMachineFunction(*MF, CheckStr));
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}
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// CTTZ expansion in terms of CTLZ
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TEST_F(LegalizerHelperTest, LowerBitCountingCTTZ1) {
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if (!TM)
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return;
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// Declare your legalization info
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DefineLegalizerInfo(A,
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{ getActionDefinitionsBuilder(G_CTLZ).legalFor({s64}); });
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// Build Instr
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auto MIBCTTZ = B.buildInstr(TargetOpcode::G_CTTZ, LLT::scalar(64), Copies[0]);
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AInfo Info(MF->getSubtarget());
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LegalizerHelper Helper(*MF, Info);
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// Perform Legalization
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ASSERT_TRUE(Helper.lower(*MIBCTTZ, 0, LLT::scalar(64)) ==
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LegalizerHelper::LegalizeResult::Legalized);
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auto CheckStr = R"(
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CHECK: [[NEG1:%[0-9]+]]:_(s64) = G_CONSTANT i64 -1
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CHECK: [[NOT:%[0-9]+]]:_(s64) = G_XOR %0:_, [[NEG1]]
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CHECK: [[SUB1:%[0-9]+]]:_(s64) = G_ADD %0:_, [[NEG1]]
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CHECK: [[AND1:%[0-9]+]]:_(s64) = G_AND [[NOT]]:_, [[SUB1]]:_
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CHECK: [[CST64:%[0-9]+]]:_(s64) = G_CONSTANT i64 64
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CHECK: [[CTLZ:%[0-9]+]]:_(s64) = G_CTLZ [[AND1]]:_
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CHECK: G_SUB [[CST64]]:_, [[CTLZ]]:_
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)";
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// Check
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ASSERT_TRUE(CheckMachineFunction(*MF, CheckStr));
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}
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// CTTZ expansion in terms of CTPOP
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TEST_F(LegalizerHelperTest, LowerBitCountingCTTZ2) {
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if (!TM)
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return;
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// Declare your legalization info
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DefineLegalizerInfo(
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A, { getActionDefinitionsBuilder(G_CTPOP).legalFor({s64}); });
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// Build
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auto MIBCTTZ = B.buildInstr(TargetOpcode::G_CTTZ, LLT::scalar(64), Copies[0]);
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AInfo Info(MF->getSubtarget());
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LegalizerHelper Helper(*MF, Info);
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ASSERT_TRUE(Helper.lower(*MIBCTTZ, 0, LLT::scalar(64)) ==
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LegalizerHelper::LegalizeResult::Legalized);
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auto CheckStr = R"(
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CHECK: [[NEG1:%[0-9]+]]:_(s64) = G_CONSTANT i64 -1
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CHECK: [[NOT:%[0-9]+]]:_(s64) = G_XOR %0:_, [[NEG1]]
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CHECK: [[SUB1:%[0-9]+]]:_(s64) = G_ADD %0:_, [[NEG1]]
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CHECK: [[AND1:%[0-9]+]]:_(s64) = G_AND [[NOT]]:_, [[SUB1]]:_
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CHECK: [[POP:%[0-9]+]]:_(s64) = G_CTPOP [[AND1]]
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)";
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// Check
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ASSERT_TRUE(CheckMachineFunction(*MF, CheckStr));
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}
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// CTTZ_ZERO_UNDEF expansion in terms of CTTZ
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TEST_F(LegalizerHelperTest, LowerBitCountingCTTZ3) {
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if (!TM)
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return;
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// Declare your legalization info
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DefineLegalizerInfo(A,
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{ getActionDefinitionsBuilder(G_CTTZ).legalFor({s64}); });
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// Build
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auto MIBCTTZ =
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B.buildInstr(TargetOpcode::G_CTTZ_ZERO_UNDEF, LLT::scalar(64), Copies[0]);
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AInfo Info(MF->getSubtarget());
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LegalizerHelper Helper(*MF, Info);
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ASSERT_TRUE(Helper.lower(*MIBCTTZ, 0, LLT::scalar(64)) ==
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LegalizerHelper::LegalizeResult::Legalized);
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auto CheckStr = R"(
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CHECK: CTTZ
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)";
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// Check
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ASSERT_TRUE(CheckMachineFunction(*MF, CheckStr));
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}
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// CTLZ expansion in terms of CTLZ_ZERO_UNDEF
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TEST_F(LegalizerHelperTest, LowerBitCountingCTLZ0) {
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if (!TM)
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return;
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// Declare your legalization info
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DefineLegalizerInfo(
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A, { getActionDefinitionsBuilder(G_CTLZ_ZERO_UNDEF).legalFor({s64}); });
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// Build
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auto MIBCTLZ = B.buildInstr(TargetOpcode::G_CTLZ, LLT::scalar(64), Copies[0]);
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AInfo Info(MF->getSubtarget());
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LegalizerHelper Helper(*MF, Info);
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ASSERT_TRUE(Helper.lower(*MIBCTLZ, 0, LLT::scalar(64)) ==
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LegalizerHelper::LegalizeResult::Legalized);
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auto CheckStr = R"(
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CHECK: [[CZU:%[0-9]+]]:_(s64) = G_CTLZ_ZERO_UNDEF %0
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CHECK: [[ZERO:%[0-9]+]]:_(s64) = G_CONSTANT i64 0
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CHECK: [[SIXTY4:%[0-9]+]]:_(s64) = G_CONSTANT i64 64
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CHECK: [[CMP:%[0-9]+]]:_(s1) = G_ICMP intpred(eq), %0:_(s64), [[ZERO]]
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CHECK: [[SEL:%[0-9]+]]:_(s64) = G_SELECT [[CMP]]:_(s1), [[SIXTY4]]:_, [[CZU]]
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)";
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// Check
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ASSERT_TRUE(CheckMachineFunction(*MF, CheckStr));
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}
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// CTLZ expansion
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TEST_F(LegalizerHelperTest, LowerBitCountingCTLZ1) {
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if (!TM)
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return;
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// Declare your legalization info
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DefineLegalizerInfo(A,
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{ getActionDefinitionsBuilder(G_CTPOP).legalFor({s8}); });
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// Build
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// Trunc it to s8.
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LLT s8{LLT::scalar(8)};
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auto MIBTrunc = B.buildTrunc(s8, Copies[0]);
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auto MIBCTLZ = B.buildInstr(TargetOpcode::G_CTLZ, s8, MIBTrunc);
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AInfo Info(MF->getSubtarget());
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LegalizerHelper Helper(*MF, Info);
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ASSERT_TRUE(Helper.lower(*MIBCTLZ, 0, s8) ==
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LegalizerHelper::LegalizeResult::Legalized);
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auto CheckStr = R"(
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CHECK: [[Trunc:%[0-9]+]]:_(s8) = G_TRUNC
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CHECK: [[Cst1:%[0-9]+]]:_(s8) = G_CONSTANT i8 1
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CHECK: [[Sh1:%[0-9]+]]:_(s8) = G_LSHR [[Trunc]]:_, [[Cst1]]:_
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CHECK: [[Or1:%[0-9]+]]:_(s8) = G_OR [[Trunc]]:_, [[Sh1]]:_
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CHECK: [[Cst2:%[0-9]+]]:_(s8) = G_CONSTANT i8 2
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CHECK: [[Sh2:%[0-9]+]]:_(s8) = G_LSHR [[Or1]]:_, [[Cst2]]:_
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CHECK: [[Or2:%[0-9]+]]:_(s8) = G_OR [[Or1]]:_, [[Sh2]]:_
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CHECK: [[Cst4:%[0-9]+]]:_(s8) = G_CONSTANT i8 4
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||||
CHECK: [[Sh4:%[0-9]+]]:_(s8) = G_LSHR [[Or2]]:_, [[Cst4]]:_
|
||||
CHECK: [[Or4:%[0-9]+]]:_(s8) = G_OR [[Or2]]:_, [[Sh4]]:_
|
||||
CHECK: [[CTPOP:%[0-9]+]]:_(s8) = G_CTPOP [[Or4]]:_
|
||||
CHECK: [[Len:%[0-9]+]]:_(s8) = G_CONSTANT i8 8
|
||||
CHECK: [[Sub:%[0-9]+]]:_(s8) = G_SUB [[Len]]:_, [[CTPOP]]:_
|
||||
)";
|
||||
|
||||
// Check
|
||||
ASSERT_TRUE(CheckMachineFunction(*MF, CheckStr));
|
||||
}
|
||||
} // namespace
|
|
@ -1,190 +0,0 @@
|
|||
//===- LegalizerHelperTest.h
|
||||
//-----------------------------------------------===//
|
||||
//
|
||||
// The LLVM Compiler Infrastructure
|
||||
//
|
||||
// This file is distributed under the University of Illinois Open Source
|
||||
// License. See LICENSE.TXT for details.
|
||||
//
|
||||
//===----------------------------------------------------------------------===//
|
||||
|
||||
#include "llvm/CodeGen/GlobalISel/LegalizerHelper.h"
|
||||
#include "llvm/CodeGen/GlobalISel/LegalizerInfo.h"
|
||||
#include "llvm/CodeGen/GlobalISel/MIPatternMatch.h"
|
||||
#include "llvm/CodeGen/GlobalISel/MachineIRBuilder.h"
|
||||
#include "llvm/CodeGen/GlobalISel/Utils.h"
|
||||
#include "llvm/CodeGen/MIRParser/MIRParser.h"
|
||||
#include "llvm/CodeGen/MachineFunction.h"
|
||||
#include "llvm/CodeGen/MachineModuleInfo.h"
|
||||
#include "llvm/CodeGen/TargetFrameLowering.h"
|
||||
#include "llvm/CodeGen/TargetInstrInfo.h"
|
||||
#include "llvm/CodeGen/TargetLowering.h"
|
||||
#include "llvm/CodeGen/TargetSubtargetInfo.h"
|
||||
#include "llvm/Support/FileCheck.h"
|
||||
#include "llvm/Support/SourceMgr.h"
|
||||
#include "llvm/Support/TargetRegistry.h"
|
||||
#include "llvm/Support/TargetSelect.h"
|
||||
#include "llvm/Target/TargetMachine.h"
|
||||
#include "llvm/Target/TargetOptions.h"
|
||||
#include "gtest/gtest.h"
|
||||
|
||||
using namespace llvm;
|
||||
using namespace MIPatternMatch;
|
||||
|
||||
void initLLVM() {
|
||||
InitializeAllTargets();
|
||||
InitializeAllTargetMCs();
|
||||
InitializeAllAsmPrinters();
|
||||
InitializeAllAsmParsers();
|
||||
|
||||
PassRegistry *Registry = PassRegistry::getPassRegistry();
|
||||
initializeCore(*Registry);
|
||||
initializeCodeGen(*Registry);
|
||||
}
|
||||
|
||||
/// Create a TargetMachine. As we lack a dedicated always available target for
|
||||
/// unittests, we go for "AArch64".
|
||||
std::unique_ptr<TargetMachine> createTargetMachine() {
|
||||
Triple TargetTriple("aarch64--");
|
||||
std::string Error;
|
||||
const Target *T = TargetRegistry::lookupTarget("", TargetTriple, Error);
|
||||
if (!T)
|
||||
return nullptr;
|
||||
|
||||
TargetOptions Options;
|
||||
return std::unique_ptr<TargetMachine>(T->createTargetMachine(
|
||||
"AArch64", "", "", Options, None, None, CodeGenOpt::Aggressive));
|
||||
}
|
||||
|
||||
std::unique_ptr<Module> parseMIR(LLVMContext &Context,
|
||||
std::unique_ptr<MIRParser> &MIR,
|
||||
const TargetMachine &TM, StringRef MIRCode,
|
||||
const char *FuncName, MachineModuleInfo &MMI) {
|
||||
SMDiagnostic Diagnostic;
|
||||
std::unique_ptr<MemoryBuffer> MBuffer = MemoryBuffer::getMemBuffer(MIRCode);
|
||||
MIR = createMIRParser(std::move(MBuffer), Context);
|
||||
if (!MIR)
|
||||
return nullptr;
|
||||
|
||||
std::unique_ptr<Module> M = MIR->parseIRModule();
|
||||
if (!M)
|
||||
return nullptr;
|
||||
|
||||
M->setDataLayout(TM.createDataLayout());
|
||||
|
||||
if (MIR->parseMachineFunctions(*M, MMI))
|
||||
return nullptr;
|
||||
|
||||
return M;
|
||||
}
|
||||
|
||||
std::pair<std::unique_ptr<Module>, std::unique_ptr<MachineModuleInfo>>
|
||||
createDummyModule(LLVMContext &Context, const TargetMachine &TM,
|
||||
StringRef MIRFunc) {
|
||||
SmallString<512> S;
|
||||
StringRef MIRString = (Twine(R"MIR(
|
||||
---
|
||||
...
|
||||
name: func
|
||||
registers:
|
||||
- { id: 0, class: _ }
|
||||
- { id: 1, class: _ }
|
||||
- { id: 2, class: _ }
|
||||
- { id: 3, class: _ }
|
||||
body: |
|
||||
bb.1:
|
||||
%0(s64) = COPY $x0
|
||||
%1(s64) = COPY $x1
|
||||
%2(s64) = COPY $x2
|
||||
)MIR") + Twine(MIRFunc) + Twine("...\n"))
|
||||
.toNullTerminatedStringRef(S);
|
||||
std::unique_ptr<MIRParser> MIR;
|
||||
auto MMI = make_unique<MachineModuleInfo>(&TM);
|
||||
std::unique_ptr<Module> M =
|
||||
parseMIR(Context, MIR, TM, MIRString, "func", *MMI);
|
||||
return make_pair(std::move(M), std::move(MMI));
|
||||
}
|
||||
|
||||
static MachineFunction *getMFFromMMI(const Module *M,
|
||||
const MachineModuleInfo *MMI) {
|
||||
Function *F = M->getFunction("func");
|
||||
auto *MF = MMI->getMachineFunction(*F);
|
||||
return MF;
|
||||
}
|
||||
|
||||
static void collectCopies(SmallVectorImpl<unsigned> &Copies,
|
||||
MachineFunction *MF) {
|
||||
for (auto &MBB : *MF)
|
||||
for (MachineInstr &MI : MBB) {
|
||||
if (MI.getOpcode() == TargetOpcode::COPY)
|
||||
Copies.push_back(MI.getOperand(0).getReg());
|
||||
}
|
||||
}
|
||||
|
||||
class LegalizerHelperTest : public ::testing::Test {
|
||||
protected:
|
||||
LegalizerHelperTest() : ::testing::Test() {
|
||||
TM = createTargetMachine();
|
||||
if (!TM)
|
||||
return;
|
||||
ModuleMMIPair = createDummyModule(Context, *TM, "");
|
||||
MF = getMFFromMMI(ModuleMMIPair.first.get(), ModuleMMIPair.second.get());
|
||||
collectCopies(Copies, MF);
|
||||
EntryMBB = &*MF->begin();
|
||||
B.setMF(*MF);
|
||||
MRI = &MF->getRegInfo();
|
||||
B.setInsertPt(*EntryMBB, EntryMBB->end());
|
||||
}
|
||||
LLVMContext Context;
|
||||
std::unique_ptr<TargetMachine> TM;
|
||||
MachineFunction *MF;
|
||||
std::pair<std::unique_ptr<Module>, std::unique_ptr<MachineModuleInfo>>
|
||||
ModuleMMIPair;
|
||||
SmallVector<unsigned, 4> Copies;
|
||||
MachineBasicBlock *EntryMBB;
|
||||
MachineIRBuilder B;
|
||||
MachineRegisterInfo *MRI;
|
||||
};
|
||||
|
||||
#define DefineLegalizerInfo(Name, SettingUpActionsBlock) \
|
||||
class Name##Info : public LegalizerInfo { \
|
||||
public: \
|
||||
Name##Info(const TargetSubtargetInfo &ST) { \
|
||||
using namespace TargetOpcode; \
|
||||
const LLT s8 = LLT::scalar(8); \
|
||||
(void)s8; \
|
||||
const LLT s16 = LLT::scalar(16); \
|
||||
(void)s16; \
|
||||
const LLT s32 = LLT::scalar(32); \
|
||||
(void)s32; \
|
||||
const LLT s64 = LLT::scalar(64); \
|
||||
(void)s64; \
|
||||
do \
|
||||
SettingUpActionsBlock while (0); \
|
||||
computeTables(); \
|
||||
verify(*ST.getInstrInfo()); \
|
||||
} \
|
||||
};
|
||||
|
||||
static bool CheckMachineFunction(const MachineFunction &MF,
|
||||
StringRef CheckStr) {
|
||||
SmallString<512> Msg;
|
||||
raw_svector_ostream OS(Msg);
|
||||
MF.print(OS);
|
||||
auto OutputBuf = MemoryBuffer::getMemBuffer(Msg, "Output", false);
|
||||
auto CheckBuf = MemoryBuffer::getMemBuffer(CheckStr, "");
|
||||
SmallString<4096> CheckFileBuffer;
|
||||
FileCheckRequest Req;
|
||||
FileCheck FC(Req);
|
||||
StringRef CheckFileText =
|
||||
FC.CanonicalizeFile(*CheckBuf.get(), CheckFileBuffer);
|
||||
SourceMgr SM;
|
||||
SM.AddNewSourceBuffer(MemoryBuffer::getMemBuffer(CheckFileText, "CheckFile"),
|
||||
SMLoc());
|
||||
Regex PrefixRE = FC.buildCheckPrefixRegex();
|
||||
std::vector<FileCheckString> CheckStrings;
|
||||
FC.ReadCheckFile(SM, CheckFileText, PrefixRE, CheckStrings);
|
||||
auto OutBuffer = OutputBuf->getBuffer();
|
||||
SM.AddNewSourceBuffer(std::move(OutputBuf), SMLoc());
|
||||
return FC.CheckInput(SM, OutBuffer, CheckStrings);
|
||||
}
|
Loading…
Reference in New Issue