forked from OSchip/llvm-project
[TargetLowering] make helper function for SetCC + and optimizations (NFC)
After looking at D19087 again, it occurred to me that we can do better. If we consolidate the valueHasExactlyOneBitSet() transforms, we won't incur extra overhead from calling it a 2nd time, and we can shrink SimplifySetCC() a bit. No functional change intended. Differential Revision: http://reviews.llvm.org/D20050 llvm-svn: 268932
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@ -3018,6 +3018,11 @@ public:
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/// Lower TLS global address SDNode for target independent emulated TLS model.
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virtual SDValue LowerToTLSEmulatedModel(const GlobalAddressSDNode *GA,
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SelectionDAG &DAG) const;
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private:
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SDValue simplifySetCCWithAnd(EVT VT, SDValue N0, SDValue N1,
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ISD::CondCode Cond, DAGCombinerInfo &DCI,
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SDLoc DL) const;
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};
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/// Given an LLVM IR type and return type attributes, compute the return value
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@ -1304,18 +1304,20 @@ bool TargetLowering::isExtendedTrueVal(const ConstantSDNode *N, EVT VT,
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llvm_unreachable("Unexpected enumeration.");
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}
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/// If the target supports an 'and-not' or 'and-complement' logic operation,
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/// try to use that to make a comparison operation more efficient.
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static SDValue createAndNotSetCC(EVT VT, SDValue N0, SDValue N1,
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ISD::CondCode Cond, SelectionDAG &DAG,
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SDLoc dl) {
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/// This helper function of SimplifySetCC tries to optimize the comparison when
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/// either operand of the SetCC node is a bitwise-and instruction.
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SDValue TargetLowering::simplifySetCCWithAnd(EVT VT, SDValue N0, SDValue N1,
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ISD::CondCode Cond,
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DAGCombinerInfo &DCI,
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SDLoc DL) const {
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// Match these patterns in any of their permutations:
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// (X & Y) == Y
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// (X & Y) != Y
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if (N1.getOpcode() == ISD::AND && N0.getOpcode() != ISD::AND)
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std::swap(N0, N1);
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if (N0.getOpcode() != ISD::AND || !N0.hasOneUse() ||
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EVT OpVT = N0.getValueType();
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if (N0.getOpcode() != ISD::AND || !OpVT.isInteger() ||
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(Cond != ISD::SETEQ && Cond != ISD::SETNE))
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return SDValue();
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@ -1330,24 +1332,37 @@ static SDValue createAndNotSetCC(EVT VT, SDValue N0, SDValue N1,
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return SDValue();
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}
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// Bail out if the compare operand that we want to turn into a zero is already
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// a zero (otherwise, infinite loop).
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auto *YConst = dyn_cast<ConstantSDNode>(Y);
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if (YConst && YConst->isNullValue())
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return SDValue();
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SelectionDAG &DAG = DCI.DAG;
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SDValue Zero = DAG.getConstant(0, DL, OpVT);
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if (valueHasExactlyOneBitSet(Y, DAG)) {
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// Simplify X & Y == Y to X & Y != 0 if Y has exactly one bit set.
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// Note that where Y is variable and is known to have at most one bit set
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// (for example, if it is Z & 1) we cannot do this; the expressions are not
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// equivalent when Y == 0.
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Cond = ISD::getSetCCInverse(Cond, /*isInteger=*/true);
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if (DCI.isBeforeLegalizeOps() ||
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isCondCodeLegal(Cond, N0.getSimpleValueType()))
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return DAG.getSetCC(DL, VT, N0, Zero, Cond);
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} else if (N0.hasOneUse() && hasAndNotCompare(Y)) {
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// If the target supports an 'and-not' or 'and-complement' logic operation,
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// try to use that to make a comparison operation more efficient.
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// But don't do this transform if the mask is a single bit because there are
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// more efficient ways to deal with that case (for example, 'bt' on x86 or
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// 'rlwinm' on PPC).
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// We don't want to do this transform if the mask is a single bit because
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// there are more efficient ways to deal with that case (for example, 'bt' on
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// x86 or 'rlwinm' on PPC).
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if (!DAG.getTargetLoweringInfo().hasAndNotCompare(Y) ||
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valueHasExactlyOneBitSet(Y, DAG))
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return SDValue();
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// Bail out if the compare operand that we want to turn into a zero is
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// already a zero (otherwise, infinite loop).
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auto *YConst = dyn_cast<ConstantSDNode>(Y);
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if (YConst && YConst->isNullValue())
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return SDValue();
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// Transform this into: ~X & Y == 0.
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EVT OpVT = X.getValueType();
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SDValue NotX = DAG.getNOT(SDLoc(X), X, OpVT);
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SDValue NewAnd = DAG.getNode(ISD::AND, SDLoc(N0), OpVT, NotX, Y);
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return DAG.getSetCC(dl, VT, NewAnd, DAG.getConstant(0, dl, OpVT), Cond);
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// Transform this into: ~X & Y == 0.
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SDValue NotX = DAG.getNOT(SDLoc(X), X, OpVT);
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SDValue NewAnd = DAG.getNode(ISD::AND, SDLoc(N0), OpVT, NotX, Y);
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return DAG.getSetCC(DL, VT, NewAnd, Zero, Cond);
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}
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return SDValue();
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}
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/// Try to simplify a setcc built with the specified operands and cc. If it is
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@ -2134,32 +2149,8 @@ TargetLowering::SimplifySetCC(EVT VT, SDValue N0, SDValue N1,
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}
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}
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// Simplify x&y == y to x&y != 0 if y has exactly one bit set.
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// Note that where y is variable and is known to have at most
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// one bit set (for example, if it is z&1) we cannot do this;
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// the expressions are not equivalent when y==0.
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if (N0.getOpcode() == ISD::AND)
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if (N0.getOperand(0) == N1 || N0.getOperand(1) == N1) {
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if (valueHasExactlyOneBitSet(N1, DAG)) {
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Cond = ISD::getSetCCInverse(Cond, /*isInteger=*/true);
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if (DCI.isBeforeLegalizeOps() ||
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isCondCodeLegal(Cond, N0.getSimpleValueType())) {
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SDValue Zero = DAG.getConstant(0, dl, N1.getValueType());
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return DAG.getSetCC(dl, VT, N0, Zero, Cond);
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}
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}
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}
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if (N1.getOpcode() == ISD::AND)
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if (N1.getOperand(0) == N0 || N1.getOperand(1) == N0) {
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if (valueHasExactlyOneBitSet(N0, DAG)) {
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Cond = ISD::getSetCCInverse(Cond, /*isInteger=*/true);
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if (DCI.isBeforeLegalizeOps() ||
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isCondCodeLegal(Cond, N1.getSimpleValueType())) {
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SDValue Zero = DAG.getConstant(0, dl, N0.getValueType());
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return DAG.getSetCC(dl, VT, N1, Zero, Cond);
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}
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}
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}
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if (SDValue V = simplifySetCCWithAnd(VT, N0, N1, Cond, DCI, dl))
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return V;
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}
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// Fold away ALL boolean setcc's.
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@ -2212,9 +2203,6 @@ TargetLowering::SimplifySetCC(EVT VT, SDValue N0, SDValue N1,
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return N0;
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}
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if (SDValue AndNotCC = createAndNotSetCC(VT, N0, N1, Cond, DAG, dl))
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return AndNotCC;
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// Could not fold it.
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return SDValue();
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}
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