forked from OSchip/llvm-project
[WebAssembly][NFC] Move specific instruction formats to specific files
Summary: WebAssemblyInstrFormats.td retains only multiclasses that are used in multiple other tablegen files. Reviewers: aheejin, dschuff Subscribers: sbc100, jgravelle-google, sunfish, jfb, llvm-commits Differential Revision: https://reviews.llvm.org/D51143 llvm-svn: 340503
This commit is contained in:
Thomas Lively
parent
ab0011ebc0
commit
914f0f20a4
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@ -16,6 +16,14 @@
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// Atomic loads
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//===----------------------------------------------------------------------===//
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multiclass ATOMIC_I<dag oops_r, dag iops_r, dag oops_s, dag iops_s,
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list<dag> pattern_r, string asmstr_r = "",
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string asmstr_s = "", bits<32> inst = -1> {
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defm "" : I<oops_r, iops_r, oops_s, iops_s, pattern_r, asmstr_r, asmstr_s,
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inst>,
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Requires<[HasAtomics]>;
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}
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let Defs = [ARGUMENTS] in {
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defm ATOMIC_LOAD_I32 : WebAssemblyLoad<I32, "i32.atomic.load", 0xfe10>;
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defm ATOMIC_LOAD_I64 : WebAssemblyLoad<I64, "i64.atomic.load", 0xfe11>;
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@ -12,6 +12,39 @@
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///
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//===----------------------------------------------------------------------===//
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multiclass UnaryFP<SDNode node, string name, bits<32> f32Inst,
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bits<32> f64Inst> {
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defm _F32 : I<(outs F32:$dst), (ins F32:$src), (outs), (ins),
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[(set F32:$dst, (node F32:$src))],
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!strconcat("f32.", !strconcat(name, "\t$dst, $src")),
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!strconcat("f32.", name), f32Inst>;
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defm _F64 : I<(outs F64:$dst), (ins F64:$src), (outs), (ins),
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[(set F64:$dst, (node F64:$src))],
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!strconcat("f64.", !strconcat(name, "\t$dst, $src")),
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!strconcat("f64.", name), f64Inst>;
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}
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multiclass BinaryFP<SDNode node, string name, bits<32> f32Inst,
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bits<32> f64Inst> {
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defm _F32 : I<(outs F32:$dst), (ins F32:$lhs, F32:$rhs), (outs), (ins),
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[(set F32:$dst, (node F32:$lhs, F32:$rhs))],
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!strconcat("f32.", !strconcat(name, "\t$dst, $lhs, $rhs")),
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!strconcat("f32.", name), f32Inst>;
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defm _F64 : I<(outs F64:$dst), (ins F64:$lhs, F64:$rhs), (outs), (ins),
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[(set F64:$dst, (node F64:$lhs, F64:$rhs))],
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!strconcat("f64.", !strconcat(name, "\t$dst, $lhs, $rhs")),
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!strconcat("f64.", name), f64Inst>;
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}
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multiclass ComparisonFP<CondCode cond, string name, bits<32> f32Inst, bits<32> f64Inst> {
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defm _F32 : I<(outs I32:$dst), (ins F32:$lhs, F32:$rhs), (outs), (ins),
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[(set I32:$dst, (setcc F32:$lhs, F32:$rhs, cond))],
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!strconcat("f32.", !strconcat(name, "\t$dst, $lhs, $rhs")),
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!strconcat("f32.", name), f32Inst>;
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defm _F64 : I<(outs I32:$dst), (ins F64:$lhs, F64:$rhs), (outs), (ins),
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[(set I32:$dst, (setcc F64:$lhs, F64:$rhs, cond))],
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!strconcat("f64.", !strconcat(name, "\t$dst, $lhs, $rhs")),
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!strconcat("f64.", name), f64Inst>;
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}
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let Defs = [ARGUMENTS] in {
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let isCommutable = 1 in
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@ -58,6 +58,7 @@ multiclass NRI<dag oops, dag iops, list<dag> pattern, string asmstr = "",
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defm "": I<oops, iops, oops, iops, pattern, asmstr, asmstr, inst>;
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}
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// Instructions requiring HasSIMD128 and the simd128 prefix byte
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multiclass SIMD_I<dag oops_r, dag iops_r, dag oops_s, dag iops_s,
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list<dag> pattern_r, string asmstr_r = "",
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string asmstr_s = "", bits<32> simdop = -1> {
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@ -65,120 +66,3 @@ multiclass SIMD_I<dag oops_r, dag iops_r, dag oops_s, dag iops_s,
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!or(0xfd00, !and(0xff, simdop))>,
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Requires<[HasSIMD128]>;
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}
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multiclass ATOMIC_I<dag oops_r, dag iops_r, dag oops_s, dag iops_s,
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list<dag> pattern_r, string asmstr_r = "",
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string asmstr_s = "", bits<32> inst = -1> {
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defm "" : I<oops_r, iops_r, oops_s, iops_s, pattern_r, asmstr_r, asmstr_s,
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inst>,
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Requires<[HasAtomics]>;
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}
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// Unary and binary instructions, for the local types that WebAssembly supports.
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multiclass UnaryInt<SDNode node, string name, bits<32> i32Inst,
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bits<32> i64Inst> {
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defm _I32 : I<(outs I32:$dst), (ins I32:$src), (outs), (ins),
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[(set I32:$dst, (node I32:$src))],
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!strconcat("i32.", !strconcat(name, "\t$dst, $src")),
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!strconcat("i32.", name), i32Inst>;
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defm _I64 : I<(outs I64:$dst), (ins I64:$src), (outs), (ins),
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[(set I64:$dst, (node I64:$src))],
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!strconcat("i64.", !strconcat(name, "\t$dst, $src")),
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!strconcat("i64.", name), i64Inst>;
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}
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multiclass BinaryInt<SDNode node, string name, bits<32> i32Inst,
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bits<32> i64Inst> {
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defm _I32 : I<(outs I32:$dst), (ins I32:$lhs, I32:$rhs), (outs), (ins),
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[(set I32:$dst, (node I32:$lhs, I32:$rhs))],
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!strconcat("i32.", !strconcat(name, "\t$dst, $lhs, $rhs")),
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!strconcat("i32.", name), i32Inst>;
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defm _I64 : I<(outs I64:$dst), (ins I64:$lhs, I64:$rhs), (outs), (ins),
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[(set I64:$dst, (node I64:$lhs, I64:$rhs))],
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!strconcat("i64.", !strconcat(name, "\t$dst, $lhs, $rhs")),
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!strconcat("i64.", name), i64Inst>;
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}
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multiclass UnaryFP<SDNode node, string name, bits<32> f32Inst,
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bits<32> f64Inst> {
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defm _F32 : I<(outs F32:$dst), (ins F32:$src), (outs), (ins),
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[(set F32:$dst, (node F32:$src))],
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!strconcat("f32.", !strconcat(name, "\t$dst, $src")),
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!strconcat("f32.", name), f32Inst>;
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defm _F64 : I<(outs F64:$dst), (ins F64:$src), (outs), (ins),
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[(set F64:$dst, (node F64:$src))],
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!strconcat("f64.", !strconcat(name, "\t$dst, $src")),
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!strconcat("f64.", name), f64Inst>;
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}
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multiclass BinaryFP<SDNode node, string name, bits<32> f32Inst,
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bits<32> f64Inst> {
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defm _F32 : I<(outs F32:$dst), (ins F32:$lhs, F32:$rhs), (outs), (ins),
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[(set F32:$dst, (node F32:$lhs, F32:$rhs))],
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!strconcat("f32.", !strconcat(name, "\t$dst, $lhs, $rhs")),
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!strconcat("f32.", name), f32Inst>;
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defm _F64 : I<(outs F64:$dst), (ins F64:$lhs, F64:$rhs), (outs), (ins),
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[(set F64:$dst, (node F64:$lhs, F64:$rhs))],
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!strconcat("f64.", !strconcat(name, "\t$dst, $lhs, $rhs")),
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!strconcat("f64.", name), f64Inst>;
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}
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multiclass SIMDBinaryIntNoI64x2<SDNode node, string name, bits<32> baseInst> {
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defm _I8x16 : SIMD_I<(outs V128:$dst), (ins V128:$lhs, V128:$rhs),
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(outs), (ins),
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[(set (v16i8 V128:$dst), (node V128:$lhs, V128:$rhs))],
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!strconcat("i8x16.",
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!strconcat(name, "\t$dst, $lhs, $rhs")),
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!strconcat("i8x16.", name), baseInst>;
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defm _I16x8 : SIMD_I<(outs V128:$dst), (ins V128:$lhs, V128:$rhs),
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(outs), (ins),
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[(set (v8i16 V128:$dst), (node V128:$lhs, V128:$rhs))],
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!strconcat("i16x8.",
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!strconcat(name, "\t$dst, $lhs, $rhs")),
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!strconcat("i16x8.", name), !add(baseInst, 1)>;
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defm _I32x4 : SIMD_I<(outs V128:$dst), (ins V128:$lhs, V128:$rhs),
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(outs), (ins),
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[(set (v4i32 V128:$dst), (node V128:$lhs, V128:$rhs))],
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!strconcat("i32x4.",
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!strconcat(name, "\t$dst, $lhs, $rhs")),
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!strconcat("i32x4.", name), !add(baseInst, 2)>;
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}
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multiclass SIMDBinaryInt<SDNode node, string name, bits<32> baseInst> {
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defm "" : SIMDBinaryIntNoI64x2<node, name, baseInst>;
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defm _I64x2 : SIMD_I<(outs V128:$dst), (ins V128:$lhs, V128:$rhs),
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(outs), (ins),
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[(set (v2i64 V128:$dst), (node V128:$lhs, V128:$rhs))],
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!strconcat("i64x2.",
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!strconcat(name, "\t$dst, $lhs, $rhs")),
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!strconcat("i64x2.", name), !add(baseInst, 3)>;
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}
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multiclass SIMDBinaryFP<SDNode node, string name, bits<32> baseInst> {
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defm _F32x4 : SIMD_I<(outs V128:$dst), (ins V128:$lhs, V128:$rhs),
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(outs), (ins),
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[(set (v4f32 V128:$dst), (node V128:$lhs, V128:$rhs))],
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!strconcat("f32x4.",
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!strconcat(name, "\t$dst, $lhs, $rhs")),
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!strconcat("f32x4.", name), baseInst>;
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defm _F64x2 : SIMD_I<(outs V128:$dst), (ins V128:$lhs, V128:$rhs),
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(outs), (ins),
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[(set (v2f64 V128:$dst), (node V128:$lhs, V128:$rhs))],
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!strconcat("f64x2.",
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!strconcat(name, "\t$dst, $lhs, $rhs")),
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!strconcat("f64x2.", name), !add(baseInst, 1)>;
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}
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multiclass ComparisonInt<CondCode cond, string name, bits<32> i32Inst, bits<32> i64Inst> {
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defm _I32 : I<(outs I32:$dst), (ins I32:$lhs, I32:$rhs), (outs), (ins),
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[(set I32:$dst, (setcc I32:$lhs, I32:$rhs, cond))],
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!strconcat("i32.", !strconcat(name, "\t$dst, $lhs, $rhs")),
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!strconcat("i32.", name), i32Inst>;
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defm _I64 : I<(outs I32:$dst), (ins I64:$lhs, I64:$rhs), (outs), (ins),
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[(set I32:$dst, (setcc I64:$lhs, I64:$rhs, cond))],
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!strconcat("i64.", !strconcat(name, "\t$dst, $lhs, $rhs")),
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!strconcat("i64.", name), i64Inst>;
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}
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multiclass ComparisonFP<CondCode cond, string name, bits<32> f32Inst, bits<32> f64Inst> {
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defm _F32 : I<(outs I32:$dst), (ins F32:$lhs, F32:$rhs), (outs), (ins),
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[(set I32:$dst, (setcc F32:$lhs, F32:$rhs, cond))],
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!strconcat("f32.", !strconcat(name, "\t$dst, $lhs, $rhs")),
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!strconcat("f32.", name), f32Inst>;
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defm _F64 : I<(outs I32:$dst), (ins F64:$lhs, F64:$rhs), (outs), (ins),
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[(set I32:$dst, (setcc F64:$lhs, F64:$rhs, cond))],
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!strconcat("f64.", !strconcat(name, "\t$dst, $lhs, $rhs")),
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!strconcat("f64.", name), f64Inst>;
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}
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@ -12,6 +12,40 @@
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///
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//===----------------------------------------------------------------------===//
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multiclass UnaryInt<SDNode node, string name, bits<32> i32Inst,
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bits<32> i64Inst> {
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defm _I32 : I<(outs I32:$dst), (ins I32:$src), (outs), (ins),
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[(set I32:$dst, (node I32:$src))],
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!strconcat("i32.", !strconcat(name, "\t$dst, $src")),
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!strconcat("i32.", name), i32Inst>;
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defm _I64 : I<(outs I64:$dst), (ins I64:$src), (outs), (ins),
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[(set I64:$dst, (node I64:$src))],
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!strconcat("i64.", !strconcat(name, "\t$dst, $src")),
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!strconcat("i64.", name), i64Inst>;
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}
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multiclass BinaryInt<SDNode node, string name, bits<32> i32Inst,
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bits<32> i64Inst> {
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defm _I32 : I<(outs I32:$dst), (ins I32:$lhs, I32:$rhs), (outs), (ins),
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[(set I32:$dst, (node I32:$lhs, I32:$rhs))],
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!strconcat("i32.", !strconcat(name, "\t$dst, $lhs, $rhs")),
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!strconcat("i32.", name), i32Inst>;
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defm _I64 : I<(outs I64:$dst), (ins I64:$lhs, I64:$rhs), (outs), (ins),
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[(set I64:$dst, (node I64:$lhs, I64:$rhs))],
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!strconcat("i64.", !strconcat(name, "\t$dst, $lhs, $rhs")),
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!strconcat("i64.", name), i64Inst>;
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}
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multiclass ComparisonInt<CondCode cond, string name, bits<32> i32Inst, bits<32> i64Inst> {
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defm _I32 : I<(outs I32:$dst), (ins I32:$lhs, I32:$rhs), (outs), (ins),
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[(set I32:$dst, (setcc I32:$lhs, I32:$rhs, cond))],
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!strconcat("i32.", !strconcat(name, "\t$dst, $lhs, $rhs")),
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!strconcat("i32.", name), i32Inst>;
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defm _I64 : I<(outs I32:$dst), (ins I64:$lhs, I64:$rhs), (outs), (ins),
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[(set I32:$dst, (setcc I64:$lhs, I64:$rhs, cond))],
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!strconcat("i64.", !strconcat(name, "\t$dst, $lhs, $rhs")),
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!strconcat("i64.", name), i64Inst>;
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}
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let Defs = [ARGUMENTS] in {
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// The spaces after the names are for aesthetic purposes only, to make
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@ -18,6 +18,51 @@ def ImmI#SIZE : ImmLeaf<i32, "return (Imm & ((1UL << "#SIZE#") - 1)) == Imm;">;
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foreach SIZE = [2, 4, 8, 16, 32] in
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def LaneIdx#SIZE : ImmLeaf<i32, "return 0 <= Imm && Imm < "#SIZE#";">;
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multiclass SIMDBinaryFP<SDNode node, string name, bits<32> baseInst> {
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defm _F32x4 : SIMD_I<(outs V128:$dst), (ins V128:$lhs, V128:$rhs),
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(outs), (ins),
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[(set (v4f32 V128:$dst), (node V128:$lhs, V128:$rhs))],
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!strconcat("f32x4.",
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!strconcat(name, "\t$dst, $lhs, $rhs")),
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!strconcat("f32x4.", name), baseInst>;
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defm _F64x2 : SIMD_I<(outs V128:$dst), (ins V128:$lhs, V128:$rhs),
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(outs), (ins),
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[(set (v2f64 V128:$dst), (node V128:$lhs, V128:$rhs))],
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!strconcat("f64x2.",
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!strconcat(name, "\t$dst, $lhs, $rhs")),
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!strconcat("f64x2.", name), !add(baseInst, 1)>;
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}
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multiclass SIMDBinaryIntNoI64x2<SDNode node, string name, bits<32> baseInst> {
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defm _I8x16 : SIMD_I<(outs V128:$dst), (ins V128:$lhs, V128:$rhs),
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(outs), (ins),
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[(set (v16i8 V128:$dst), (node V128:$lhs, V128:$rhs))],
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!strconcat("i8x16.",
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!strconcat(name, "\t$dst, $lhs, $rhs")),
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!strconcat("i8x16.", name), baseInst>;
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defm _I16x8 : SIMD_I<(outs V128:$dst), (ins V128:$lhs, V128:$rhs),
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(outs), (ins),
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[(set (v8i16 V128:$dst), (node V128:$lhs, V128:$rhs))],
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!strconcat("i16x8.",
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!strconcat(name, "\t$dst, $lhs, $rhs")),
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!strconcat("i16x8.", name), !add(baseInst, 1)>;
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defm _I32x4 : SIMD_I<(outs V128:$dst), (ins V128:$lhs, V128:$rhs),
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(outs), (ins),
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[(set (v4i32 V128:$dst), (node V128:$lhs, V128:$rhs))],
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!strconcat("i32x4.",
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!strconcat(name, "\t$dst, $lhs, $rhs")),
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!strconcat("i32x4.", name), !add(baseInst, 2)>;
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}
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multiclass SIMDBinaryInt<SDNode node, string name, bits<32> baseInst> {
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defm "" : SIMDBinaryIntNoI64x2<node, name, baseInst>;
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defm _I64x2 : SIMD_I<(outs V128:$dst), (ins V128:$lhs, V128:$rhs),
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(outs), (ins),
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[(set (v2i64 V128:$dst), (node V128:$lhs, V128:$rhs))],
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!strconcat("i64x2.",
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!strconcat(name, "\t$dst, $lhs, $rhs")),
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!strconcat("i64x2.", name), !add(baseInst, 3)>;
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}
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// const vectors
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multiclass ConstVec<ValueType vec_t, dag ops, dag pat, string args> {
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defm CONST_V128_#vec_t : SIMD_I<(outs V128:$dst), ops, (outs), ops,
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