From 913cc3072d0500667444fbfdfed6c43d431d7f3f Mon Sep 17 00:00:00 2001 From: Jim Grosbach Date: Fri, 30 Mar 2012 21:54:22 +0000 Subject: [PATCH] ARM fix encoding fixup resolution for ldrd and friends. The 8-bit payload is not contiguous in the opcode. Move the upper nibble over 4 bits into the correct place. rdar://11158641 llvm-svn: 153780 --- llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp | 2 ++ 1 file changed, 2 insertions(+) diff --git a/llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp b/llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp index 3ba891da4f7d..5f2138d5de99 100644 --- a/llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp +++ b/llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp @@ -469,7 +469,9 @@ static unsigned adjustFixupValue(unsigned Kind, uint64_t Value) { Value = -Value; isAdd = false; } + // The value has the low 4 bits encoded in [3:0] and the high 4 in [11:8]. assert ((Value < 256) && "Out of range pc-relative fixup value!"); + Value = (Value & 0xf) | ((Value & 0xf0) << 4); return Value | (isAdd << 23); } case ARM::fixup_arm_pcrel_10: