forked from OSchip/llvm-project
[ELF] Delete relOff from TargetInfo::writePLT
This change only affects EM_386. relOff can be computed from `index` easily, so it is unnecessarily passed as a parameter. Both in.plt and in.iplt entries are written by writePLT. For in.iplt, the instruction `push reloc_offset` will change because `index` is now different. Fortunately, this does not matter because `push; jmp` is only used by PLT. IPLT does not need the code sequence. Reviewed By: grimar, ruiu Differential Revision: https://reviews.llvm.org/D71518
This commit is contained in:
parent
98afa2c1f1
commit
90d195d026
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@ -38,7 +38,7 @@ public:
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void writeGotPlt(uint8_t *buf, const Symbol &s) const override;
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void writePltHeader(uint8_t *buf) const override;
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void writePlt(uint8_t *buf, uint64_t gotPltEntryAddr, uint64_t pltEntryAddr,
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int32_t index, unsigned relOff) const override;
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int32_t index) const override;
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bool needsThunk(RelExpr expr, RelType type, const InputFile *file,
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uint64_t branchAddr, const Symbol &s,
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int64_t a) const override;
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@ -214,8 +214,7 @@ void AArch64::writePltHeader(uint8_t *buf) const {
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}
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void AArch64::writePlt(uint8_t *buf, uint64_t gotPltEntryAddr,
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uint64_t pltEntryAddr, int32_t index,
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unsigned relOff) const {
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uint64_t pltEntryAddr, int32_t index) const {
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const uint8_t inst[] = {
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0x10, 0x00, 0x00, 0x90, // adrp x16, Page(&(.plt.got[n]))
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0x11, 0x02, 0x40, 0xf9, // ldr x17, [x16, Offset(&(.plt.got[n]))]
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@ -570,7 +569,7 @@ public:
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AArch64BtiPac();
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void writePltHeader(uint8_t *buf) const override;
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void writePlt(uint8_t *buf, uint64_t gotPltEntryAddr, uint64_t pltEntryAddr,
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int32_t index, unsigned relOff) const override;
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int32_t index) const override;
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private:
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bool btiHeader; // bti instruction needed in PLT Header
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@ -630,8 +629,7 @@ void AArch64BtiPac::writePltHeader(uint8_t *buf) const {
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}
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void AArch64BtiPac::writePlt(uint8_t *buf, uint64_t gotPltEntryAddr,
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uint64_t pltEntryAddr, int32_t index,
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unsigned relOff) const {
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uint64_t pltEntryAddr, int32_t index) const {
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// The PLT entry is of the form:
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// [btiData] addrInst (pacBr | stdBr) [nopData]
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const uint8_t btiData[] = { 0x5f, 0x24, 0x03, 0xd5 }; // bti c
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@ -35,7 +35,7 @@ public:
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void writeIgotPlt(uint8_t *buf, const Symbol &s) const override;
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void writePltHeader(uint8_t *buf) const override;
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void writePlt(uint8_t *buf, uint64_t gotPltEntryAddr, uint64_t pltEntryAddr,
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int32_t index, unsigned relOff) const override;
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int32_t index) const override;
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void addPltSymbols(InputSection &isec, uint64_t off) const override;
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void addPltHeaderSymbols(InputSection &isd) const override;
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bool needsThunk(RelExpr expr, RelType type, const InputFile *file,
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@ -216,8 +216,7 @@ void ARM::addPltHeaderSymbols(InputSection &isec) const {
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// Long form PLT entries that do not have any restrictions on the displacement
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// of the .plt from the .plt.got.
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static void writePltLong(uint8_t *buf, uint64_t gotPltEntryAddr,
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uint64_t pltEntryAddr, int32_t index,
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unsigned relOff) {
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uint64_t pltEntryAddr) {
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const uint8_t pltData[] = {
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0x04, 0xc0, 0x9f, 0xe5, // ldr ip, L2
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0x0f, 0xc0, 0x8c, 0xe0, // L1: add ip, ip, pc
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@ -232,8 +231,7 @@ static void writePltLong(uint8_t *buf, uint64_t gotPltEntryAddr,
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// The default PLT entries require the .plt.got to be within 128 Mb of the
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// .plt in the positive direction.
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void ARM::writePlt(uint8_t *buf, uint64_t gotPltEntryAddr,
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uint64_t pltEntryAddr, int32_t index,
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unsigned relOff) const {
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uint64_t pltEntryAddr, int32_t /*index*/) const {
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// The PLT entry is similar to the example given in Appendix A of ELF for
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// the Arm Architecture. Instead of using the Group Relocations to find the
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// optimal rotation for the 8-bit immediate used in the add instructions we
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@ -248,7 +246,7 @@ void ARM::writePlt(uint8_t *buf, uint64_t gotPltEntryAddr,
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uint64_t offset = gotPltEntryAddr - pltEntryAddr - 8;
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if (!llvm::isUInt<27>(offset)) {
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// We cannot encode the Offset, use the long form.
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writePltLong(buf, gotPltEntryAddr, pltEntryAddr, index, relOff);
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writePltLong(buf, gotPltEntryAddr, pltEntryAddr);
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return;
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}
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write32le(buf + 0, pltData[0] | ((offset >> 20) & 0xff));
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@ -34,7 +34,7 @@ public:
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void relocateOne(uint8_t *loc, RelType type, uint64_t val) const override;
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void writePltHeader(uint8_t *buf) const override;
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void writePlt(uint8_t *buf, uint64_t gotPltEntryAddr, uint64_t pltEntryAddr,
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int32_t index, unsigned relOff) const override;
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int32_t index) const override;
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};
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} // namespace
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@ -303,8 +303,7 @@ void Hexagon::writePltHeader(uint8_t *buf) const {
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}
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void Hexagon::writePlt(uint8_t *buf, uint64_t gotPltEntryAddr,
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uint64_t pltEntryAddr, int32_t index,
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unsigned relOff) const {
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uint64_t pltEntryAddr, int32_t index) const {
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const uint8_t inst[] = {
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0x00, 0x40, 0x00, 0x00, // { immext (#0)
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0x0e, 0xc0, 0x49, 0x6a, // r14 = add (pc, ##GOTn@PCREL) }
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@ -33,7 +33,7 @@ public:
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void writeGotPlt(uint8_t *buf, const Symbol &s) const override;
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void writePltHeader(uint8_t *buf) const override;
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void writePlt(uint8_t *buf, uint64_t gotPltEntryAddr, uint64_t pltEntryAddr,
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int32_t index, unsigned relOff) const override;
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int32_t index) const override;
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bool needsThunk(RelExpr expr, RelType type, const InputFile *file,
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uint64_t branchAddr, const Symbol &s,
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int64_t a) const override;
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@ -319,8 +319,7 @@ template <class ELFT> void MIPS<ELFT>::writePltHeader(uint8_t *buf) const {
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template <class ELFT>
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void MIPS<ELFT>::writePlt(uint8_t *buf, uint64_t gotPltEntryAddr,
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uint64_t pltEntryAddr, int32_t index,
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unsigned relOff) const {
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uint64_t pltEntryAddr, int32_t /*index*/) const {
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if (isMicroMips()) {
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// Overwrite trap instructions written by Writer::writeTrapInstr.
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memset(buf, 0, pltEntrySize);
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@ -32,7 +32,7 @@ public:
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llvm_unreachable("should call writePPC32GlinkSection() instead");
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}
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void writePlt(uint8_t *buf, uint64_t gotPltEntryAddr, uint64_t pltEntryAddr,
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int32_t index, unsigned relOff) const override {
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int32_t index) const override {
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llvm_unreachable("should call writePPC32GlinkSection() instead");
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}
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void writeGotPlt(uint8_t *buf, const Symbol &s) const override;
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@ -201,7 +201,7 @@ public:
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RelType getDynRel(RelType type) const override;
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void writePltHeader(uint8_t *buf) const override;
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void writePlt(uint8_t *buf, uint64_t gotPltEntryAddr, uint64_t pltEntryAddr,
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int32_t index, unsigned relOff) const override;
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int32_t index) const override;
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void relocateOne(uint8_t *loc, RelType type, uint64_t val) const override;
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void writeGotHeader(uint8_t *buf) const override;
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bool needsThunk(RelExpr expr, RelType type, const InputFile *file,
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@ -669,8 +669,7 @@ void PPC64::writePltHeader(uint8_t *buf) const {
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}
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void PPC64::writePlt(uint8_t *buf, uint64_t gotPltEntryAddr,
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uint64_t pltEntryAddr, int32_t index,
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unsigned relOff) const {
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uint64_t pltEntryAddr, int32_t index) const {
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int32_t offset = pltHeaderSize + index * pltEntrySize;
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// bl __glink_PLTresolve
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write32(buf, 0x48000000 | ((-offset) & 0x03FFFFFc));
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@ -28,7 +28,7 @@ public:
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void writeGotPlt(uint8_t *buf, const Symbol &s) const override;
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void writePltHeader(uint8_t *buf) const override;
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void writePlt(uint8_t *buf, uint64_t gotPltEntryAddr, uint64_t pltEntryAddr,
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int32_t index, unsigned relOff) const override;
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int32_t index) const override;
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RelType getDynRel(RelType type) const override;
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RelExpr getRelExpr(RelType type, const Symbol &s,
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const uint8_t *loc) const override;
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@ -163,8 +163,7 @@ void RISCV::writePltHeader(uint8_t *buf) const {
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}
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void RISCV::writePlt(uint8_t *buf, uint64_t gotPltEntryAddr,
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uint64_t pltEntryAddr, int32_t index,
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unsigned relOff) const {
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uint64_t pltEntryAddr, int32_t /*index*/) const {
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// 1: auipc t3, %pcrel_hi(f@.got.plt)
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// l[wd] t3, %pcrel_lo(1b)(t3)
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// jalr t1, t3
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@ -27,7 +27,7 @@ public:
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RelExpr getRelExpr(RelType type, const Symbol &s,
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const uint8_t *loc) const override;
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void writePlt(uint8_t *buf, uint64_t gotEntryAddr, uint64_t pltEntryAddr,
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int32_t index, unsigned relOff) const override;
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int32_t index) const override;
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void relocateOne(uint8_t *loc, RelType type, uint64_t val) const override;
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};
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} // namespace
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@ -125,8 +125,7 @@ void SPARCV9::relocateOne(uint8_t *loc, RelType type, uint64_t val) const {
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}
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void SPARCV9::writePlt(uint8_t *buf, uint64_t gotEntryAddr,
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uint64_t pltEntryAddr, int32_t index,
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unsigned relOff) const {
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uint64_t pltEntryAddr, int32_t index) const {
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const uint8_t pltData[] = {
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0x03, 0x00, 0x00, 0x00, // sethi (. - .PLT0), %g1
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0x30, 0x68, 0x00, 0x00, // ba,a %xcc, .PLT1
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@ -34,7 +34,7 @@ public:
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void writeIgotPlt(uint8_t *buf, const Symbol &s) const override;
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void writePltHeader(uint8_t *buf) const override;
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void writePlt(uint8_t *buf, uint64_t gotPltEntryAddr, uint64_t pltEntryAddr,
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int32_t index, unsigned relOff) const override;
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int32_t index) const override;
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void relocateOne(uint8_t *loc, RelType type, uint64_t val) const override;
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RelExpr adjustRelaxExpr(RelType type, const uint8_t *data,
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@ -214,8 +214,8 @@ void X86::writePltHeader(uint8_t *buf) const {
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}
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void X86::writePlt(uint8_t *buf, uint64_t gotPltEntryAddr,
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uint64_t pltEntryAddr, int32_t index,
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unsigned relOff) const {
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uint64_t pltEntryAddr, int32_t index) const {
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unsigned relOff = in.relaPlt->entsize * index;
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if (config->isPic) {
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const uint8_t inst[] = {
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0xff, 0xa3, 0, 0, 0, 0, // jmp *foo@GOT(%ebx)
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void writeGotPlt(uint8_t *buf, const Symbol &s) const override;
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void writePltHeader(uint8_t *buf) const override;
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void writePlt(uint8_t *buf, uint64_t gotPltEntryAddr, uint64_t pltEntryAddr,
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int32_t index, unsigned relOff) const override;
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int32_t index) const override;
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};
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class RetpolineNoPic : public X86 {
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@ -425,7 +425,7 @@ public:
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void writeGotPlt(uint8_t *buf, const Symbol &s) const override;
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void writePltHeader(uint8_t *buf) const override;
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void writePlt(uint8_t *buf, uint64_t gotPltEntryAddr, uint64_t pltEntryAddr,
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int32_t index, unsigned relOff) const override;
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int32_t index) const override;
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};
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} // namespace
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@ -460,8 +460,8 @@ void RetpolinePic::writePltHeader(uint8_t *buf) const {
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}
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void RetpolinePic::writePlt(uint8_t *buf, uint64_t gotPltEntryAddr,
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uint64_t pltEntryAddr, int32_t index,
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unsigned relOff) const {
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uint64_t pltEntryAddr, int32_t index) const {
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unsigned relOff = in.relaPlt->entsize * index;
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const uint8_t insn[] = {
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0x50, // pushl %eax
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0x8b, 0x83, 0, 0, 0, 0, // mov foo@GOT(%ebx), %eax
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@ -518,8 +518,8 @@ void RetpolineNoPic::writePltHeader(uint8_t *buf) const {
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}
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void RetpolineNoPic::writePlt(uint8_t *buf, uint64_t gotPltEntryAddr,
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uint64_t pltEntryAddr, int32_t index,
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unsigned relOff) const {
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uint64_t pltEntryAddr, int32_t index) const {
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unsigned relOff = in.relaPlt->entsize * index;
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const uint8_t insn[] = {
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0x50, // 0: pushl %eax
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0xa1, 0, 0, 0, 0, // 1: mov foo_in_GOT, %eax
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@ -34,7 +34,7 @@ public:
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void writeGotPlt(uint8_t *buf, const Symbol &s) const override;
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void writePltHeader(uint8_t *buf) const override;
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void writePlt(uint8_t *buf, uint64_t gotPltEntryAddr, uint64_t pltEntryAddr,
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int32_t index, unsigned relOff) const override;
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int32_t index) const override;
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void relocateOne(uint8_t *loc, RelType type, uint64_t val) const override;
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RelExpr adjustRelaxExpr(RelType type, const uint8_t *data,
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@ -156,8 +156,7 @@ void X86_64::writePltHeader(uint8_t *buf) const {
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}
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void X86_64::writePlt(uint8_t *buf, uint64_t gotPltEntryAddr,
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uint64_t pltEntryAddr, int32_t index,
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unsigned relOff) const {
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uint64_t pltEntryAddr, int32_t index) const {
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const uint8_t inst[] = {
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0xff, 0x25, 0, 0, 0, 0, // jmpq *got(%rip)
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0x68, 0, 0, 0, 0, // pushq <relocation index>
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@ -584,7 +583,7 @@ public:
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void writeGotPlt(uint8_t *buf, const Symbol &s) const override;
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void writePltHeader(uint8_t *buf) const override;
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void writePlt(uint8_t *buf, uint64_t gotPltEntryAddr, uint64_t pltEntryAddr,
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int32_t index, unsigned relOff) const override;
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int32_t index) const override;
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};
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class RetpolineZNow : public X86_64 {
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@ -593,7 +592,7 @@ public:
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void writeGotPlt(uint8_t *buf, const Symbol &s) const override {}
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void writePltHeader(uint8_t *buf) const override;
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void writePlt(uint8_t *buf, uint64_t gotPltEntryAddr, uint64_t pltEntryAddr,
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int32_t index, unsigned relOff) const override;
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int32_t index) const override;
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};
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} // namespace
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@ -629,8 +628,7 @@ void Retpoline::writePltHeader(uint8_t *buf) const {
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}
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void Retpoline::writePlt(uint8_t *buf, uint64_t gotPltEntryAddr,
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uint64_t pltEntryAddr, int32_t index,
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unsigned relOff) const {
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uint64_t pltEntryAddr, int32_t index) const {
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const uint8_t insn[] = {
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0x4c, 0x8b, 0x1d, 0, 0, 0, 0, // 0: mov foo@GOTPLT(%rip), %r11
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0xe8, 0, 0, 0, 0, // 7: callq plt+0x20
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@ -672,8 +670,7 @@ void RetpolineZNow::writePltHeader(uint8_t *buf) const {
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}
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void RetpolineZNow::writePlt(uint8_t *buf, uint64_t gotPltEntryAddr,
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uint64_t pltEntryAddr, int32_t index,
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unsigned relOff) const {
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uint64_t pltEntryAddr, int32_t index) const {
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const uint8_t insn[] = {
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0x4c, 0x8b, 0x1d, 0, 0, 0, 0, // mov foo@GOTPLT(%rip), %r11
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0xe9, 0, 0, 0, 0, // jmp plt+0
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@ -2471,17 +2471,11 @@ void PltSection::writeTo(uint8_t *buf) {
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target->writePltHeader(buf);
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size_t off = headerSize;
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RelocationBaseSection *relSec = isIplt ? in.relaIplt : in.relaPlt;
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// The IPlt is immediately after the Plt, account for this in relOff
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size_t pltOff = isIplt ? in.plt->getSize() : 0;
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for (size_t i = 0, e = entries.size(); i != e; ++i) {
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const Symbol *b = entries[i];
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unsigned relOff = relSec->entsize * i + pltOff;
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uint64_t got = b->getGotPltVA();
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uint64_t plt = this->getVA() + off;
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target->writePlt(buf + off, got, plt, b->pltIndex, relOff);
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target->writePlt(buf + off, got, plt, b->pltIndex);
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off += target->pltEntrySize;
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}
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}
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@ -42,8 +42,7 @@ public:
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virtual void writePltHeader(uint8_t *buf) const {}
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virtual void writePlt(uint8_t *buf, uint64_t gotEntryAddr,
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uint64_t pltEntryAddr, int32_t index,
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unsigned relOff) const {}
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uint64_t pltEntryAddr, int32_t index) const {}
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virtual void addPltHeaderSymbols(InputSection &isec) const {}
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virtual void addPltSymbols(InputSection &isec, uint64_t off) const {}
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@ -122,11 +122,11 @@
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// DISASM-EMPTY:
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// DISASM-NEXT: foo:
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// DISASM-NEXT: 401100: jmpl *4202784
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// DISASM-NEXT: pushl $16
|
||||
// DISASM-NEXT: pushl $0
|
||||
// DISASM-NEXT: jmp -32 <_start+0xa>
|
||||
// DISASM: bar:
|
||||
// DISASM-NEXT: 401110: jmpl *4202788
|
||||
// DISASM-NEXT: pushl $24
|
||||
// DISASM-NEXT: pushl $8
|
||||
// DISASM-NEXT: jmp -48 <_start+0xa>
|
||||
|
||||
.text
|
||||
|
|
|
@ -62,10 +62,10 @@
|
|||
// DISASM-NEXT: pushl $8
|
||||
// DISASM-NEXT: jmp -48 <.plt>
|
||||
// DISASM-NEXT: jmpl *4207276
|
||||
// DISASM-NEXT: pushl $48
|
||||
// DISASM-NEXT: pushl $0
|
||||
// DISASM-NEXT: jmp -32 <zed2@plt>
|
||||
// DISASM-NEXT: jmpl *4207280
|
||||
// DISASM-NEXT: pushl $56
|
||||
// DISASM-NEXT: pushl $8
|
||||
// DISASM-NEXT: jmp -48 <zed2@plt>
|
||||
|
||||
.text
|
||||
|
|
Loading…
Reference in New Issue