forked from OSchip/llvm-project
parent
d98d22b9af
commit
90adefcf7e
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@ -135,6 +135,13 @@ PseudoInst<(outs), (ins i32imm:$amt), NoItinerary,
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[(ARMcallseq_start imm:$amt)]>, Requires<[IsThumb1Only]>;
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}
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def tNOP : T1pI<(outs), (ins), NoItinerary, "nop", "",
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[/* For disassembly only; pattern left blank */]>,
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T1Encoding<0b101111> {
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let Inst{9-8} = 0b11;
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let Inst{7-0} = 0b00000000;
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}
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// The i32imm operand $val can be used by a debugger to store more information
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// about the breakpoint.
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def tBKPT : T1I<(outs), (ins i32imm:$val), NoItinerary, "bkpt\t$val",
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@ -347,7 +354,7 @@ let isBranch = 1, isTerminator = 1 in {
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// A8.6.16 B: Encoding T1
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// If Inst{11-8} == 0b1111 then SEE SVC
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let isCall = 1 in {
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def tSVC : T1I<(outs), (ins i32imm:$svc, pred:$cc), IIC_Br, "svc$cc\t$svc", []>,
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def tSVC : T1pI<(outs), (ins i32imm:$svc), IIC_Br, "svc", "\t$svc", []>,
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Encoding16 {
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let Inst{15-12} = 0b1101;
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let Inst{11-8} = 0b1111;
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