forked from OSchip/llvm-project
[X86][fast-isel] Fix select lowering.
The condition in selects is supposed to be i1. Make sure we are just reading the less significant bit of the 8 bits width value to match this constraint. <rdar://problem/15651765> llvm-svn: 197712
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@ -1508,8 +1508,13 @@ bool X86FastISel::X86SelectSelect(const Instruction *I) {
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unsigned Op2Reg = getRegForValue(I->getOperand(2));
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if (Op2Reg == 0) return false;
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BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL, TII.get(X86::TEST8rr))
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.addReg(Op0Reg).addReg(Op0Reg);
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// Selects operate on i1, however, Op0Reg is 8 bits width and may contain
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// garbage. Indeed, only the less significant bit is supposed to be accurate.
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// If we read more than the lsb, we may see non-zero values whereas lsb
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// is zero. Therefore, we have to truncate Op0Reg to i1 for the select.
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// This is acheived by performing TEST against 1.
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BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL, TII.get(X86::TEST8ri))
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.addReg(Op0Reg).addImm(1);
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unsigned ResultReg = createResultReg(RC);
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BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL, TII.get(Opc), ResultReg)
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.addReg(Op1Reg).addReg(Op2Reg);
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@ -0,0 +1,16 @@
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; RUN: llc -mtriple x86_64-apple-darwin -O0 -o - < %s | FileCheck %s
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; Make sure we only use the less significant bit of the value that feeds the
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; select. Otherwise, we may account for a non-zero value whereas the
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; lsb is zero.
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; <rdar://problem/15651765>
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; CHECK-LABEL: fastisel_select:
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; CHECK: subb {{%[a-z0-9]+}}, [[RES:%[a-z0-9]+]]
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; CHECK: testb $1, [[RES]]
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; CHECK: cmovel
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define i32 @fastisel_select(i1 %exchSub2211_, i1 %trunc_8766) {
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%shuffleInternal15257_8932 = sub i1 %exchSub2211_, %trunc_8766
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%counter_diff1345 = select i1 %shuffleInternal15257_8932, i32 1204476887, i32 0
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ret i32 %counter_diff1345
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}
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