[LoongArch] Use `end namespace xxx` style comment. NFC

llvm/lib/Target/LoongArch/AsmParser/LoongArchAsmParser.cpp

@@ -248,7 +248,7 @@ public:
     addExpr(Inst, getImm());
   }
 };
-} // end anonymous namespace
+} // end namespace
 
 #define GET_REGISTER_MATCHER
 #define GET_SUBTARGET_FEATURE_NAME

llvm/lib/Target/LoongArch/Disassembler/LoongArchDisassembler.cpp

@@ -39,7 +39,7 @@ public:
                               ArrayRef<uint8_t> Bytes, uint64_t Address,
                               raw_ostream &CStream) const override;
 };
-} // end anonymous namespace
+} // end namespace
 
 static MCDisassembler *createLoongArchDisassembler(const Target &T,
                                                    const MCSubtargetInfo &STI,

llvm/lib/Target/LoongArch/LoongArch.h

@@ -33,6 +33,6 @@ bool lowerLoongArchMachineOperandToMCOperand(const MachineOperand &MO,
                                              const AsmPrinter &AP);
 
 FunctionPass *createLoongArchISelDag(LoongArchTargetMachine &TM);
-} // namespace llvm
+} // end namespace llvm
 
 #endif // LLVM_LIB_TARGET_LOONGARCH_LOONGARCH_H

llvm/lib/Target/LoongArch/LoongArchFrameLowering.h

@@ -52,5 +52,5 @@ private:
                  const DebugLoc &DL, Register DestReg, Register SrcReg,
                  int64_t Val, MachineInstr::MIFlag Flag) const;
 };
-} // namespace llvm
+} // end namespace llvm
 #endif // LLVM_LIB_TARGET_LOONGARCH_LOONGARCHFRAMELOWERING_H

llvm/lib/Target/LoongArch/LoongArchISelDAGToDAG.h

@@ -55,6 +55,6 @@ public:
 #include "LoongArchGenDAGISel.inc"
 };
 
-} // namespace llvm
+} // end namespace llvm
 
 #endif // LLVM_LIB_TARGET_LOONGARCH_LOONGARCHISELDAGTODAG_H

llvm/lib/Target/LoongArch/LoongArchISelLowering.h

@@ -45,7 +45,7 @@ enum NodeType : unsigned {
   BSTRPICK,
 
 };
-} // namespace LoongArchISD
+} // end namespace LoongArchISD
 
 class LoongArchTargetLowering : public TargetLowering {
   const LoongArchSubtarget &Subtarget;

llvm/lib/Target/LoongArch/LoongArchRegisterInfo.h

@@ -45,6 +45,6 @@ struct LoongArchRegisterInfo : public LoongArchGenRegisterInfo {
 
   Register getFrameRegister(const MachineFunction &MF) const override;
 };
-} // namespace llvm
+} // end namespace llvm
 
 #endif // LLVM_LIB_TARGET_LOONGARCH_LOONGARCHREGISTERINFO_H

llvm/lib/Target/LoongArch/LoongArchSubtarget.h

@@ -84,6 +84,6 @@ public:
   unsigned getGRLen() const { return GRLen; }
   LoongArchABI::ABI getTargetABI() const { return TargetABI; }
 };
-} // namespace llvm
+} // end namespace llvm
 
 #endif // LLVM_LIB_TARGET_LOONGARCH_LOONGARCHSUBTARGET_H

llvm/lib/Target/LoongArch/LoongArchTargetMachine.cpp

@@ -103,7 +103,7 @@ public:
   void addIRPasses() override;
   bool addInstSelector() override;
 };
-} // namespace
+} // end namespace
 
 TargetPassConfig *
 LoongArchTargetMachine::createPassConfig(PassManagerBase &PM) {

llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchAsmBackend.h

@@ -58,6 +58,6 @@ public:
   std::unique_ptr<MCObjectTargetWriter>
   createObjectTargetWriter() const override;
 };
-} // namespace llvm
+} // end namespace llvm
 
 #endif // LLVM_LIB_TARGET_LOONGARCH_MCTARGETDESC_LOONGARCHASMBACKEND_H

llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchBaseInfo.cpp

@@ -35,6 +35,6 @@ ABI getTargetABI(StringRef ABIName) {
 // FIXME: other register?
 MCRegister getBPReg() { return LoongArch::R31; }
 
-} // namespace LoongArchABI
+} // end namespace LoongArchABI
 
-} // namespace llvm
+} // end namespace llvm

llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchBaseInfo.h

@@ -37,8 +37,8 @@ ABI getTargetABI(StringRef ABIName);
 
 // Returns the register used to hold the stack pointer after realignment.
 MCRegister getBPReg();
-} // namespace LoongArchABI
+} // end namespace LoongArchABI
 
-} // namespace llvm
+} // end namespace llvm
 
 #endif // LLVM_LIB_TARGET_LOONGARCH_MCTARGETDESC_LOONGARCHBASEINFO_H

llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchELFObjectWriter.cpp

@@ -33,7 +33,7 @@ protected:
   unsigned getRelocType(MCContext &Ctx, const MCValue &Target,
                         const MCFixup &Fixup, bool IsPCRel) const override;
 };
-} // namespace
+} // end namespace
 
 LoongArchELFObjectWriter::LoongArchELFObjectWriter(uint8_t OSABI, bool Is64Bit)
     : MCELFObjectTargetWriter(Is64Bit, OSABI, ELF::EM_LOONGARCH,

llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchInstPrinter.h

@@ -44,6 +44,6 @@ private:
   void printOperand(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI,
                     raw_ostream &O);
 };
-} // namespace llvm
+} // end namespace llvm
 
 #endif // LLVM_LIB_TARGET_LOONGARCH_MCTARGETDESC_LOONGARCHINSTPRINTER_H

llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchMCAsmInfo.h

@@ -25,6 +25,6 @@ public:
   explicit LoongArchMCAsmInfo(const Triple &TargetTriple);
 };
 
-} // namespace llvm
+} // end namespace llvm
 
 #endif // LLVM_LIB_TARGET_LOONGARCH_MCTARGETDESC_LOONGARCHMCASMINFO_H

llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchMCCodeEmitter.cpp

@@ -69,7 +69,7 @@ public:
                              SmallVectorImpl<MCFixup> &Fixups,
                              const MCSubtargetInfo &STI) const;
 };
-} // end anonymous namespace
+} // end namespace
 
 unsigned
 LoongArchMCCodeEmitter::getMachineOpValue(const MCInst &MI, const MCOperand &MO,

llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchMCTargetDesc.cpp

@@ -95,7 +95,7 @@ public:
   }
 };
 
-} // end anonymous namespace
+} // end namespace
 
 static MCInstrAnalysis *createLoongArchInstrAnalysis(const MCInstrInfo *Info) {
   return new LoongArchMCInstrAnalysis(Info);

llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchMCTargetDesc.h

@@ -38,7 +38,7 @@ MCAsmBackend *createLoongArchAsmBackend(const Target &T,
 std::unique_ptr<MCObjectTargetWriter>
 createLoongArchELFObjectWriter(uint8_t OSABI, bool Is64Bit);
 
-} // namespace llvm
+} // end namespace llvm
 
 // Defines symbolic names for LoongArch registers.
 #define GET_REGINFO_ENUM

llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchMatInt.h

@@ -24,7 +24,7 @@ using InstSeq = SmallVector<Inst, 4>;
 // Helper to generate an instruction sequence that will materialise the given
 // immediate value into a register.
 InstSeq generateInstSeq(int64_t Val);
-} // namespace LoongArchMatInt
-} // namespace llvm
+} // end namespace LoongArchMatInt
+} // end namespace llvm
 
 #endif

llvm/lib/Target/LoongArch/TargetInfo/LoongArchTargetInfo.h

@@ -16,6 +16,6 @@ class Target;
 Target &getTheLoongArch32Target();
 Target &getTheLoongArch64Target();
 
-} // namespace llvm
+} // end namespace llvm
 
 #endif // LLVM_LIB_TARGET_LOONGARCH_TARGETINFO_LOONGARCHTARGETINFO_H