From 901d9e65f68207c7aea0e829228870c4f70ec497 Mon Sep 17 00:00:00 2001 From: Lauro Ramos Venancio Date: Fri, 12 Jan 2007 20:52:27 +0000 Subject: [PATCH] Don't add or sub zero to sp. llvm-svn: 33142 --- llvm/lib/Target/ARM/ARMRegisterInfo.cpp | 16 ++++++++++------ llvm/test/Regression/CodeGen/ARM/spaddsub.ll | 10 ++++++++++ 2 files changed, 20 insertions(+), 6 deletions(-) create mode 100644 llvm/test/Regression/CodeGen/ARM/spaddsub.ll diff --git a/llvm/lib/Target/ARM/ARMRegisterInfo.cpp b/llvm/lib/Target/ARM/ARMRegisterInfo.cpp index 4890e3094fe6..16a1a29660e2 100644 --- a/llvm/lib/Target/ARM/ARMRegisterInfo.cpp +++ b/llvm/lib/Target/ARM/ARMRegisterInfo.cpp @@ -206,9 +206,11 @@ void ARMRegisterInfo::emitPrologue(MachineFunction &MF) const { MFI->setStackSize(NumBytes); - //sub sp, sp, #NumBytes - splitInstructionWithImmediate(MBB, MBBI, TII.get(ARM::SUB), ARM::R13, - ARM::R13, NumBytes); + if (NumBytes) { + //sub sp, sp, #NumBytes + splitInstructionWithImmediate(MBB, MBBI, TII.get(ARM::SUB), ARM::R13, + ARM::R13, NumBytes); + } if (HasFP) { @@ -234,9 +236,11 @@ void ARMRegisterInfo::emitEpilogue(MachineFunction &MF, BuildMI(MBB, MBBI, TII.get(ARM::LDR), ARM::R11).addReg(ARM::R13).addImm(0); } - //add sp, sp, #NumBytes - splitInstructionWithImmediate(MBB, MBBI, TII.get(ARM::ADD), ARM::R13, - ARM::R13, NumBytes); + if (NumBytes){ + //add sp, sp, #NumBytes + splitInstructionWithImmediate(MBB, MBBI, TII.get(ARM::ADD), ARM::R13, + ARM::R13, NumBytes); + } } diff --git a/llvm/test/Regression/CodeGen/ARM/spaddsub.ll b/llvm/test/Regression/CodeGen/ARM/spaddsub.ll new file mode 100644 index 000000000000..ef3b9b7c1d13 --- /dev/null +++ b/llvm/test/Regression/CodeGen/ARM/spaddsub.ll @@ -0,0 +1,10 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -f -march=arm -o %t.s && +; RUN: not grep "add r13, r13, #0" < %t.s && +; RUN: not grep "sub r13, r13, #0" < %t.s + +int %f() { +entry: + ret int 1 +} + +