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Add aeskeygenassist intrinsic and rename all of the aes intrinsics to 

aes instead of sse4.2.  Add a brief todo for a subtarget flag and rework
the aeskeygenassist instruction to more closely match the docs.

llvm-svn: 100078
This commit is contained in:
Eric Christopher 2010-04-01 03:05:45 +00:00
parent 5464e5ae00
commit 9002ac5d93
2 changed files with 38 additions and 26 deletions
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14
llvm/include/llvm/IntrinsicsX86.td
View File

@ -781,21 +781,25 @@ let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.".
// Advanced Encryption Standard (AES) Instructions
let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.".
def int_x86_sse42_aesimc :
def int_x86_aesni_aesimc : GCCBuiltin<"__builtin_ia32_aesimc128">,
Intrinsic<[llvm_v2i64_ty], [llvm_v2i64_ty, llvm_v2i64_ty],
[IntrNoMem]>;
def int_x86_sse42_aesenc :
def int_x86_aesni_aesenc : GCCBuiltin<"__builtin_ia32_aesenc128">,
Intrinsic<[llvm_v2i64_ty], [llvm_v2i64_ty, llvm_v2i64_ty],
[IntrNoMem]>;
def int_x86_sse42_aesenclast :
def int_x86_aesni_aesenclast : GCCBuiltin<"__builtin_ia32_aesenclast128">,
Intrinsic<[llvm_v2i64_ty], [llvm_v2i64_ty, llvm_v2i64_ty],
[IntrNoMem]>;
def int_x86_sse42_aesdec :
def int_x86_aesni_aesdec : GCCBuiltin<"__builtin_ia32_aesdec128">,
Intrinsic<[llvm_v2i64_ty], [llvm_v2i64_ty, llvm_v2i64_ty],
[IntrNoMem]>;
def int_x86_sse42_aesdeclast :
def int_x86_aesni_aesdeclast : GCCBuiltin<"__builtin_ia32_aesdeclast128">,
Intrinsic<[llvm_v2i64_ty], [llvm_v2i64_ty, llvm_v2i64_ty],
[IntrNoMem]>;
def int_x86_aesni_aeskeygenassist :
GCCBuiltin<"__builtin_ia32_aeskeygenassist">,
Intrinsic<[llvm_v2i64_ty], [llvm_v2i64_ty, llvm_i32_ty],
[IntrNoMem]>;
}
// Vector pack

50
llvm/lib/Target/X86/X86InstrSSE.td
View File

@ -3848,44 +3848,52 @@ def : Pat<(v2i64 (X86pcmpgtq VR128:$src1, VR128:$src2)),
def : Pat<(v2i64 (X86pcmpgtq VR128:$src1, (memop addr:$src2))),
(PCMPGTQrm VR128:$src1, addr:$src2)>;
// TODO: These should be AES as a feature set.
defm AESIMC : SS42I_binop_rm_int<0xDB, "aesimc",
int_x86_sse42_aesimc>;
int_x86_aesni_aesimc>;
defm AESENC : SS42I_binop_rm_int<0xDC, "aesenc",
int_x86_sse42_aesenc>;
int_x86_aesni_aesenc>;
defm AESENCLAST : SS42I_binop_rm_int<0xDD, "aesenclast",
int_x86_sse42_aesenclast>;
int_x86_aesni_aesenclast>;
defm AESDEC : SS42I_binop_rm_int<0xDE, "aesdec",
int_x86_sse42_aesdec>;
int_x86_aesni_aesdec>;
defm AESDECLAST : SS42I_binop_rm_int<0xDF, "aesdeclast",
int_x86_sse42_aesdeclast>;
int_x86_aesni_aesdeclast>;
def : Pat<(v2i64 (int_x86_sse42_aesimc VR128:$src1, VR128:$src2)),
def : Pat<(v2i64 (int_x86_aesni_aesimc VR128:$src1, VR128:$src2)),
(AESIMCrr VR128:$src1, VR128:$src2)>;
def : Pat<(v2i64 (int_x86_sse42_aesimc VR128:$src1, (memop addr:$src2))),
def : Pat<(v2i64 (int_x86_aesni_aesimc VR128:$src1, (memop addr:$src2))),
(AESIMCrm VR128:$src1, addr:$src2)>;
def : Pat<(v2i64 (int_x86_sse42_aesenc VR128:$src1, VR128:$src2)),
def : Pat<(v2i64 (int_x86_aesni_aesenc VR128:$src1, VR128:$src2)),
(AESENCrr VR128:$src1, VR128:$src2)>;
def : Pat<(v2i64 (int_x86_sse42_aesenc VR128:$src1, (memop addr:$src2))),
def : Pat<(v2i64 (int_x86_aesni_aesenc VR128:$src1, (memop addr:$src2))),
(AESENCrm VR128:$src1, addr:$src2)>;
def : Pat<(v2i64 (int_x86_sse42_aesenclast VR128:$src1, VR128:$src2)),
def : Pat<(v2i64 (int_x86_aesni_aesenclast VR128:$src1, VR128:$src2)),
(AESENCLASTrr VR128:$src1, VR128:$src2)>;
def : Pat<(v2i64 (int_x86_sse42_aesenclast VR128:$src1, (memop addr:$src2))),
def : Pat<(v2i64 (int_x86_aesni_aesenclast VR128:$src1, (memop addr:$src2))),
(AESENCLASTrm VR128:$src1, addr:$src2)>;
def : Pat<(v2i64 (int_x86_sse42_aesdec VR128:$src1, VR128:$src2)),
def : Pat<(v2i64 (int_x86_aesni_aesdec VR128:$src1, VR128:$src2)),
(AESDECrr VR128:$src1, VR128:$src2)>;
def : Pat<(v2i64 (int_x86_sse42_aesdec VR128:$src1, (memop addr:$src2))),
def : Pat<(v2i64 (int_x86_aesni_aesdec VR128:$src1, (memop addr:$src2))),
(AESDECrm VR128:$src1, addr:$src2)>;
def : Pat<(v2i64 (int_x86_sse42_aesdeclast VR128:$src1, VR128:$src2)),
def : Pat<(v2i64 (int_x86_aesni_aesdeclast VR128:$src1, VR128:$src2)),
(AESDECLASTrr VR128:$src1, VR128:$src2)>;
def : Pat<(v2i64 (int_x86_sse42_aesdeclast VR128:$src1, (memop addr:$src2))),
def : Pat<(v2i64 (int_x86_aesni_aesdeclast VR128:$src1, (memop addr:$src2))),
(AESDECLASTrm VR128:$src1, addr:$src2)>;
def AESKEYGENASSIST128rr : SS42AI<0xDF, MRMSrcReg, (outs),
(ins VR128:$src1, VR128:$src2, i8imm:$src3),
"aeskeygenassist\t{$src3, $src2, $src1|$src1, $src2, $src3}", []>, OpSize;
def AESKEYGENASSIST128rm : SS42AI<0xDF, MRMSrcMem, (outs),
(ins VR128:$src1, i128mem:$src2, i8imm:$src3),
"aeskeygenassist\t{$src3, $src2, $src1|$src1, $src2, $src3}", []>, OpSize;
def AESKEYGENASSIST128rr : SS42AI<0xDF, MRMSrcReg, (outs VR128:$dst),
(ins VR128:$src1, i32i8imm:$src2),
"aeskeygenassist\t{$src2, $src1, $dst|$dst, $src1, $src2}",
[(set VR128:$dst,
(int_x86_aesni_aeskeygenassist VR128:$src1, imm:$src2))]>,
OpSize;
def AESKEYGENASSIST128rm : SS42AI<0xDF, MRMSrcMem, (outs VR128:$dst),
(ins i128mem:$src1, i32i8imm:$src2),
"aeskeygenassist\t{$src2, $src1, $dst|$dst, $src1, $src2}",
[(set VR128:$dst,
(int_x86_aesni_aeskeygenassist (bitconvert (memopv2i64 addr:$src1)),
imm:$src2))]>,
OpSize;
// crc intrinsic instruction
// This set of instructions are only rm, the only difference is the size